titus-larsen-titus-1981-apple-interfacing

ENABLE
1-2 GND
30
JG
FUNCTION TABLE
(Each Latch)
INPUTS
OUTPUTS
0 G 0 0
L H L H
H H H L
x L Oo Go
H =high !evel, L = low level, X ""irrelevant
Oo =the level of Q before the high-to-low transition of
1D 2D ENABLE Vee 30
,_,
'LS373, 'S373
FUNCTION TABLE
OUTPUT
CONTROL
ENABLE
G
D
H
H
H
H
H
L
x
x
x
0.0
z
FUNCTION TABLE
!EACH FLIP-FLOP)
INPUTS
OUTPUTS
CLEAR CLOCK D Q Qt
L x x L H
H t H H L
H t L L H
H L x Oo Go
fig. 3-l. p;., cMlig.,ratio:ms am! famdi" tables for Sl\!7475 [¥op), SN74LS37:'l
(middle), and Sl\!741 75 (bonom) latd-1 chips.
not continuously gated through the SN7 4175 on either the logic zero
or the logic one portion of the clock signal. This is what distinguishes
this flip-flop device from the latch devices, although in computer interfacing,
the net effect of both types of chips is the same.
A common clear input is also provided on the SN74175, so that the
flip-flops may be "cleared" ( Q=O, Q=l), when this input is taken to
D
INPUT
G
INPUT
Q
OUTPUT