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Digital integrated circuits II<br />

The clocked SR-type NAND bistable circuit here functions<br />

basically as before, except that the outputs can only change<br />

states while the clock input CLK is at logic 1. When the clock<br />

input CLK is at logic 0, it doesn’t matter what logic levels are<br />

applied to the S and R inputs, there will be no effect on the<br />

bistable.<br />

Thus, with this simple addition, we have created a bistable<br />

with a controlling input. Unless the controlling input is at logic<br />

1, nothing else can happen. This can be a very useful thing in<br />

electronics where, say, a number of things need to be counted<br />

over a period of time. For example, by clocking the circuit<br />

for, say, 1 hour, the number of cars passing a checkpoint in<br />

that time could be counted electronically.<br />

The D-type bistable<br />

A variation on the basic clocked SR-type bistable is the ‘data’<br />

bistable, or D-type bistable. A circuit is shown in Figure<br />

11.9.<br />

Figure 11.9<br />

A D-type bistable<br />

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