TMS320VC5409 Fixed-Point Digital Signal ... - Texas Instruments

IntroductionTERMINALNAMEIACKINT0INT1INT2INT3NMIRSMP/MCBIOXFDSPSISMSTRBREADYR/WIOSTRBINTERNALPIN STATESchmitttriggerSchmitttriggerSchmitttriggerSchmitttriggerI/O†O/ZIIIIIO/ZO/ZO/ZIO/ZO/ZTable 2−2. Terminal Functions (Continued)DESCRIPTIONINITIALIZATION, INTERRUPT, AND RESET OPERATIONSInterrupt acknowledge signal. IACK indicates receipt of an interrupt and that the program counteris fetching the interrupt vector location designated by A15−A0. IACK also goes into thehigh-impedance state when OFF is low.External user interrupts. INT0−INT3 are prioritized and are maskable by the interrupt mask registerand the interrupt mode bit. INT0 −INT3 can be polled and reset by way of the interrupt flag register.Nonmaskable interrupt. NMI is an external interrupt that cannot be masked by way of the INTM orthe IMR. When NMI is activated, the processor traps to the appropriate vector location.Reset. RS causes the DSP to terminate execution and causes a reinitialization of the CPU andperipherals. When RS is brought to a high level, execution begins at location 0FF80h of programmemory. RS affects various registers and status bits.Microprocessor/microcomputer mode select. If active low at reset, microcomputer mode isselected, and the internal program ROM is mapped into the upper program memory space. If thepin is driven high during reset, microprocessor mode is selected, and the on-chip ROM is removedfrom program space. MP/MC is only sampled at reset, and the MP/MC bit of the PMST register canoverride the mode that is selected at reset.MULTIPROCESSING SIGNALSBranch control. A branch can be conditionally executed when BIO is active. If low, the processorexecutes the conditional instruction. For the XC instruction, the BIO condition is sampled during thedecode phase of the pipeline; all other instructions sample BIO during the read phase of thepipeline.External flag output (latched software-programmable signal). XF is set high by the SSBX XFinstruction, set low by the RSBX XF instruction or by loading ST1. XF is used for signaling otherprocessors in multiprocessor configurations or used as a general-purpose output pin. XF goes intothe high-impedance state when OFF is low, and is set high at reset.MEMORY CONTROL SIGNALSData, program, and I/O space select signals. DS, PS, and IS are always high unless driven low foraccessing a particular external memory space. Active period corresponds to valid addressinformation. DS, PS, and IS are placed into the high-impedance state in the hold mode; the signalsalso go into the high-impedance state when OFF is low.Memory strobe signal. MSTRB is always high unless low-level asserted to indicate an external busaccess to data or program memory. MSTRB is placed in the high-impedance state in the hold mode;it also goes into the high-impedance state when OFF is low.Data ready. READY indicates that an external device is prepared for a bus transaction to becompleted. If the device is not ready (READY is low), the processor waits one cycle and checksREADY again. Note that the processor performs ready detection if at least two software wait statesare programmed. The READY signal is not sampled until the completion of the software wait states.Read/write signal. R/W indicates transfer direction during communication to an external device.R/W is normally in the read mode (high), unless it is asserted low when the DSP performs a writeoperation. R/W is placed in the high-impedance state in hold mode; it also goes into thehigh-impedance state when OFF is low.I/O strobe signal. IOSTRB is always high unless low-level asserted to indicate an external busaccess to an I/O device. IOSTRB is placed in the high-impedance state in the hold mode; it alsogoes into the high-impedance state when OFF is low.Hold. HOLD is asserted to request control of the address, data, and control lines. WhenHOLDIacknowledged by the C54x, these lines go into the high-impedance state.† I = Input, O = Output, Z = High-impedance, S = Supply‡ Although this pin includes an internal pulldown resistor, a 470-Ω external pulldown is required. If the TRST pin is connected to multiple DSPs,a buffer is recommended to ensure the VIL and VIH specifications are met.16 SPRS082FApril 1999 − Revised October 2008