TMS320VC5409 Fixed-Point Digital Signal ... - Texas Instruments

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Documentation Support5.10 Reset, BIO, Interrupt, and MP/MC TimingsTable 5−16 assumes testing over recommended operating conditions and H = 0.5t c(CO) (see Figure 5−14,Figure 5−15, and Figure 5−16).Table 5−16. Reset, BIO, Interrupt, and MP/MC Timing RequirementsMIN MAX UNITth(RS) Hold time, RS after CLKOUT low 0 nsth(BIO) Hold time, BIO after CLKOUT low 0 nsth(INT) Hold time, INTn, NMI, after CLKOUT low† 0 nsth(MPMC) Hold time, MP/MC after CLKOUT low 0 nstw(RSL) Pulse duration, RS low‡§ 4H+4 nstw(BIO)S Pulse duration, BIO low, synchronous 2H+1 nstw(BIO)A Pulse duration, BIO low, asynchronous 4H nstw(INTH)S Pulse duration, INTn, NMI high (synchronous) 2H+1 nstw(INTH)A Pulse duration, INTn, NMI high (asynchronous) 4H nstw(INTL)S Pulse duration, INTn, NMI low (synchronous) 2H+1 nstw(INTL)A Pulse duration, INTn, NMI low (asynchronous) 4H nstw(INTL)WKP Pulse duration, INTn, NMI low for IDLE2/IDLE3 wakeup 8 nstsu(RS) Setup time, RS before X2/CLKIN low 6 nstsu(BIO) Setup time, BIO before CLKOUT low 7 10 nstsu(INT) Setup time, INTn, NMI, RS before CLKOUT low 8 10 nstsu(MPMC) Setup time, MP/MC before CLKOUT low 8 ns† The external interrupts (INT0−INT3, NMI) are synchronized to the core CPU by way of a two-flip-flop synchronizer which samples these inputswith consecutive falling edges of CLKOUT. The input to the interrupt pins is required to represent a 1-0-0 sequence at the timing that iscorresponding to three CLKOUT sampling sequences.‡ If the PLL mode is selected, then at power-on sequence, or at wakeup from IDLE3, RS must be held low for at least 50 µs to ensure synchronizationand lock-in of the PLL.§ Note that RS may cause a change in clock frequency, therefore changing the value of H. Divide-by-two mode66 SPRS082FApril 1999 − Revised October 2008
Documentation SupportX2/CLKINtsu(RS)tw(RSL)RS, INTn, NMItsu(INT)th(RS)CLKOUTtsu(BIO)th(BIO)BIOtw(BIO)SFigure 5−14. Reset and BIO TimingsCLKOUTtsu(INT)tsu(INT)th(INT)INTn, NMItw(INTH)Atw(INTL)AFigure 5−15. Interrupt TimingCLKOUTRSth(MPMC)tsu(MPMC)MP/MCFigure 5−16. MP/MC TimingApril 1999 − Revised October 2008SPRS082F67
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TMS320VC5409 Fixed-PointDigital Sig
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Revision History4 SPRS082FApril 199
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ContentsSectionPage5.8 Ready Timing
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FiguresFigurePage5−25 McBSP Timin
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TablesTablePage5−23 McBSP as SPI
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Introduction2 IntroductionThe TMS32
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Introduction2.3 PGE Package Layout
Page 16 and 17: IntroductionTERMINALNAMEIACKINT0INT
Page 18 and 19: IntroductionTERMINALNAMEINTERNALPIN
Page 20 and 21: IntroductionTERMINALNAMETCKTDITDOTM
Page 22 and 23: Functional Overview15 14 12 11 9 8X
Page 24 and 25: Functional OverviewNO.BITNAMERESETV
Page 26 and 27: Functional Overview3.2 MemoryThe 54
Page 28 and 29: Functional Overview3.2.5 Relocatabl
Page 30 and 31: Functional OverviewThe HPI8/16 func
Page 32 and 33: Functional Overview3.3.2 Multichann
Page 34 and 35: Functional OverviewTable 3−7. Pin
Page 36 and 37: Functional Overview3.3.2.2 McBSP Co
Page 38 and 39: Functional Overview3.3.5 DMA Contro
Page 40 and 41: Functional OverviewHex0000007F00807
Page 42 and 43: Functional Overview3.3.5.10 DMA Int
Page 44 and 45: Functional OverviewTable 3−15. DM
Page 46 and 47: Functional Overview3.4 InterruptsVe
Page 48 and 49: Documentation Support4 Documentatio
Page 50 and 51: Documentation Support5 Electrical S
Page 52 and 53: Documentation Support5.4 Internal O
Page 54 and 55: Documentation Support5.6 Multiply-B
Page 56 and 57: Documentation SupportCLKOUTtd(CLKL-
Page 58 and 59: Documentation SupportCLKOUTtd(CLKL-
Page 60 and 61: Documentation Support5.7.4 Parallel
Page 62 and 63: Documentation SupportCLKOUTA[22:0]D
Page 64 and 65: Documentation SupportCLKOUTA[22:0]D
Page 68 and 69: Documentation Support5.11 Instructi
Page 70 and 71: Table 5−19. McBSP Transmit and Re
Page 72 and 73: Documentation Supporttc(BCKRX)tw(BC
Page 74 and 75: Documentation Support5.13.3 McBSP a
Page 76 and 77: Documentation SupportTable 5−27.
Page 78 and 79: Documentation Support5.14 Host-Port
Page 80 and 81: Documentation SupportHASSecond Byte
Page 82 and 83: Documentation Support5.14.2 HPI16 M
Page 84 and 85: Documentation SupportHCStw(DSH)tc(D
Page 86 and 87: Documentation Support5.15 GPIO Timi
Page 88 and 89: PACKAGE OPTION ADDENDUMwww.ti.com2-
Page 90: MECHANICAL DATAMPBG021C - DECEMBER
Page 93: IMPORTANT NOTICETexas Instruments I
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