TMS320VC5409 Fixed-Point Digital Signal ... - Texas Instruments

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Documentation Support5.11 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) TimingsTable 5−17 assumes testing over recommended operating conditions and H = 0.5t c(CO) (see Figure 5−17).Table 5−17. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching CharacteristicsPARAMETER MIN MAX UNITtd(CLKL-IAQL) Delay time, CLKOUT low to IAQ low 0 3 nstd(CLKL-IAQH) Delay time, CLKOUT low to IAQ high 0 3 nstd(A)IAQ Delay time, address valid to IAQ low 1 nstd(CLKL-IACKL) Delay time, CLKOUT low to IACK low 0 3 nstd(CLKL-IACKH) Delay time , CLKOUT low to IACK high 0 3 nstd(A)IACK Delay time, address valid to IACK low 1 nsth(A)IAQ Hold time, IAQ high after address invalid − 2 nsth(A)IACK Hold time, IACK high after address invalid − 2 nstw(IAQL) Pulse duration, IAQ low 2H−2 nstw(IACKL) Pulse duration, IACK low 2H−2 nsCLKOUTA[22:0]td(CLKL-IAQL)td(A)IAQtd(CLKL-IAQH)th(A)IAQIAQtw(IAQL)td(CLKL-IACKL)td(A)IACKtd(CLKL-IACKH)th(A)IACKIACKtw(IACKL)MSTRBNOTE A: A[22:16] apply to DMA accesses to extended I/O, DATA, PROGRAM memory. The CPU has access to only extendedPROGRAM memory.Figure 5−17. IAQ and IACK Timings68 SPRS082FApril 1999 − Revised October 2008
Documentation Support5.12 External Flag (XF) and TOUT Timingstd(XF)Table 5−18 assumes testing over recommended operating conditions and H = 0.5t c(CO) (see Figure 5−18 andFigure 5−19).Table 5−18. External Flag (XF) and TOUT Switching CharacteristicsPARAMETER MIN MAX UNITDelay time, CLKOUT low to XF high 0 2Delay time, CLKOUT low to XF low 0 2nstd(TOUTH) Delay time, CLKOUT low to TOUT high 0 4 nstd(TOUTL) Delay time, CLKOUT low to TOUT low 0 4 nstw(TOUT) Pulse duration, TOUT 2H nsCLKOUTtd(XF)XFFigure 5−18. XF TimingCLKOUTtd(TOUTH)td(TOUTL)TOUTtw(TOUT)Figure 5−19. TOUT TimingApril 1999 − Revised October 2008SPRS082F69
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TMS320VC5409 Fixed-PointDigital Sig
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Revision History4 SPRS082FApril 199
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ContentsSectionPage5.8 Ready Timing
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FiguresFigurePage5−25 McBSP Timin
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TablesTablePage5−23 McBSP as SPI
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Introduction2 IntroductionThe TMS32
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Introduction2.3 PGE Package Layout
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IntroductionTERMINALNAMEIACKINT0INT
Page 18 and 19: IntroductionTERMINALNAMEINTERNALPIN
Page 20 and 21: IntroductionTERMINALNAMETCKTDITDOTM
Page 22 and 23: Functional Overview15 14 12 11 9 8X
Page 24 and 25: Functional OverviewNO.BITNAMERESETV
Page 26 and 27: Functional Overview3.2 MemoryThe 54
Page 28 and 29: Functional Overview3.2.5 Relocatabl
Page 30 and 31: Functional OverviewThe HPI8/16 func
Page 32 and 33: Functional Overview3.3.2 Multichann
Page 34 and 35: Functional OverviewTable 3−7. Pin
Page 36 and 37: Functional Overview3.3.2.2 McBSP Co
Page 38 and 39: Functional Overview3.3.5 DMA Contro
Page 40 and 41: Functional OverviewHex0000007F00807
Page 42 and 43: Functional Overview3.3.5.10 DMA Int
Page 44 and 45: Functional OverviewTable 3−15. DM
Page 46 and 47: Functional Overview3.4 InterruptsVe
Page 48 and 49: Documentation Support4 Documentatio
Page 50 and 51: Documentation Support5 Electrical S
Page 52 and 53: Documentation Support5.4 Internal O
Page 54 and 55: Documentation Support5.6 Multiply-B
Page 56 and 57: Documentation SupportCLKOUTtd(CLKL-
Page 58 and 59: Documentation SupportCLKOUTtd(CLKL-
Page 60 and 61: Documentation Support5.7.4 Parallel
Page 62 and 63: Documentation SupportCLKOUTA[22:0]D
Page 64 and 65: Documentation SupportCLKOUTA[22:0]D
Page 66 and 67: Documentation Support5.10 Reset, BI
Page 70 and 71: Table 5−19. McBSP Transmit and Re
Page 72 and 73: Documentation Supporttc(BCKRX)tw(BC
Page 74 and 75: Documentation Support5.13.3 McBSP a
Page 76 and 77: Documentation SupportTable 5−27.
Page 78 and 79: Documentation Support5.14 Host-Port
Page 80 and 81: Documentation SupportHASSecond Byte
Page 82 and 83: Documentation Support5.14.2 HPI16 M
Page 84 and 85: Documentation SupportHCStw(DSH)tc(D
Page 86 and 87: Documentation Support5.15 GPIO Timi
Page 88 and 89: PACKAGE OPTION ADDENDUMwww.ti.com2-
Page 90: MECHANICAL DATAMPBG021C - DECEMBER
Page 93: IMPORTANT NOTICETexas Instruments I
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