TMS320VC5409 Fixed-Point Digital Signal ... - Texas Instruments

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Functional Overview3.2 MemoryThe 5409 device provides both on-chip ROM and RAM memories to aid in system performance andintegration.3.2.1 Memory MapHex0000007F0080Page 0 ProgramReserved(OVLY = 1)External(OVLY = 0)Hex0000007F0080Page 0 ProgramReserved(OVLY = 1)External(OVLY = 0)Hex0000005F0060007F0080DataMemory-MappedRegistersScratch-PadRAMOn-ChipDARAM†(OVLY = 1)External(OVLY = 0)On-ChipDARAM†(OVLY = 1)External(OVLY = 0)On-ChipDARAM†(32K words)7FFF 7FFF 7FFF80008000 8000ExternalExternalFF7FFF80FFFFExternalInterrupts(External)BFFFC000FEFFFF00FF7FFF80FFFFOn-Chip ROM(16K Words)ReservedInterrupts(On-Chip)BFFFC000FEFFFF00FFFFROM(DROM=1)or External(DROM=0)Reserved(DROM=1)or External(DROM=0)MP/MC= 1(Microprocessor Mode)MP/MC= 0(Microcomputer Mode)† DARAM0= 0060h − 1FFFh, DARAM1= 2000h − 3FFFhDARAM2= 4000h − 5FFFh, DARAM3= 6000h − 7FFFhFigure 3−5. Memory Map26 SPRS082FApril 1999 − Revised October 2008
Functional Overview3.2.2 On-Chip ROM With BootloaderA bootloader is available in the standard 5409 on-chip ROM. This bootloader can be used to automaticallytransfer user code from an external source to anywhere in the program memory at power up. If the MP/MCpin is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. Thislocation contains a branch instruction to the start of the bootloader program. The standard 5409 bootloaderprovides different ways to download the code to accommodate various system requirements:• Parallel from 8-bit or 16-bit-wide EPROM• Parallel from I/O space 8-bit or 16-bit mode• Serial boot from serial ports 8-bit or 16-bit mode• Host-port interface boot• SPI serial EEPROM 8-bit boot modeThe standard on-chip ROM layout is shown in Table 3−5.Table 3−5. Standard On-Chip ROM Layout †ADDRESS RANGE0x0000h − 0xBFFFhExternal program spaceDESCRIPTION0xC000h − 0xF7FFh0xF800h − 0xFBFFh0xFC00h − 0xFEFFh0xFF00h − 0xFF7Fh0xFF80h − 0xFFFFhReservedBootloaderReservedReserved†Interrupt vector table3.2.3 On-Chip RAM† In the VC5409 ROM, 128 words are reserved for factory device-testing purposes. Applicationcode to be implemented in on-chip ROM must reserve these 128 words at addressesFF00h–FF7Fh in program space.The 5409 device contains 32K × 16-bit of on-chip dual-access RAM (DARAM). The DARAM is composed offour blocks of 8K words each. Each block in the DARAM can support two reads in one cycle, or a read anda write in one cycle. The DARAM is located in the address range 0080h−7FFFh in data space, and can bemapped into program/data space by setting the OVLY bit to one.3.2.4 On-Chip Memory SecurityThe 5409 features a 16K-word × 16-bit on-chip maskable ROM.Customers can arrange to have the ROM of the 5409 programmed with contents unique to any particularapplication. A security option is available to protect a custom ROM. The ROM and ROM/RAM security optionsare available on the 5409. These security options are described in the TMS320C54x DSP Reference Set,Volume 1: CPU and Peripherals (literature number SPRU131). When the security options are enabled, JTAGemulation is inhibited or nonfunctional.April 1999 − Revised October 2008SPRS082F27
Page 1: TMS320VC5409 Fixed-PointDigital Sig
Page 4 and 5: Revision History4 SPRS082FApril 199
Page 6 and 7: ContentsSectionPage5.8 Ready Timing
Page 8 and 9: FiguresFigurePage5−25 McBSP Timin
Page 10 and 11: TablesTablePage5−23 McBSP as SPI
Page 12 and 13: Introduction2 IntroductionThe TMS32
Page 14 and 15: Introduction2.3 PGE Package Layout
Page 16 and 17: IntroductionTERMINALNAMEIACKINT0INT
Page 18 and 19: IntroductionTERMINALNAMEINTERNALPIN
Page 20 and 21: IntroductionTERMINALNAMETCKTDITDOTM
Page 22 and 23: Functional Overview15 14 12 11 9 8X
Page 24 and 25: Functional OverviewNO.BITNAMERESETV
Page 28 and 29: Functional Overview3.2.5 Relocatabl
Page 30 and 31: Functional OverviewThe HPI8/16 func
Page 32 and 33: Functional Overview3.3.2 Multichann
Page 34 and 35: Functional OverviewTable 3−7. Pin
Page 36 and 37: Functional Overview3.3.2.2 McBSP Co
Page 38 and 39: Functional Overview3.3.5 DMA Contro
Page 40 and 41: Functional OverviewHex0000007F00807
Page 42 and 43: Functional Overview3.3.5.10 DMA Int
Page 44 and 45: Functional OverviewTable 3−15. DM
Page 46 and 47: Functional Overview3.4 InterruptsVe
Page 48 and 49: Documentation Support4 Documentatio
Page 50 and 51: Documentation Support5 Electrical S
Page 52 and 53: Documentation Support5.4 Internal O
Page 54 and 55: Documentation Support5.6 Multiply-B
Page 56 and 57: Documentation SupportCLKOUTtd(CLKL-
Page 58 and 59: Documentation SupportCLKOUTtd(CLKL-
Page 60 and 61: Documentation Support5.7.4 Parallel
Page 62 and 63: Documentation SupportCLKOUTA[22:0]D
Page 64 and 65: Documentation SupportCLKOUTA[22:0]D
Page 66 and 67: Documentation Support5.10 Reset, BI
Page 68 and 69: Documentation Support5.11 Instructi
Page 70 and 71: Table 5−19. McBSP Transmit and Re
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Documentation SupportTable 5−27.
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Documentation Support5.14 Host-Port
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Documentation SupportHASSecond Byte
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Documentation Support5.14.2 HPI16 M
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Documentation SupportHCStw(DSH)tc(D
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Documentation Support5.15 GPIO Timi
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PACKAGE OPTION ADDENDUMwww.ti.com2-
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MECHANICAL DATAMPBG021C - DECEMBER
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IMPORTANT NOTICETexas Instruments I
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