Logic selection guide 2016

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Package diagrams SOT353 GW SOT363 GW Pinout Pinout 5 4 6 5 4 1 2 3 1 2 3 Package dimensions Package dimensions 0.60 0.15 5 2.25 1.85 4 0.46 0.21 1.1 0.1 0.0 2.2 1.8 6 5 4 0.45 0.15 1.1 0.8 2.25 1.35 2.00 1.15 2.2 2.0 1.35 1.15 pin 1 index 1 2 3 1 2 0.65 1.3 Dimensions in mm 3 0.30 0.15 0.25 0.08 14-10-01 0.65 1.3 Dimensions in mm 0.3 0.2 0.25 0.10 14-10-03 Solder footprint Solder footprint 134 NXP Logic selection guide 2016
SOT457 GV SOT505-2 DP Pinout Pinout 6 5 4 8 5 1 2 3 1 4 Package dimensions Package dimensions 6 3.1 2.7 5 4 0.6 0.2 1.1 0.9 3.1 2.9 8 5 1.1 max 0.15 0.00 3.0 2.5 1.7 1.3 pin 1 index 4.1 3.9 3.1 2.9 0.47 0.33 1 2 3 0.40 0.95 0.25 1.9 Dimensions in mm 0.26 0.10 14-10-03 0.65 Dimensions in mm 1 4 0.38 0.22 0.18 0.08 14-10-01 Footprint information for reflow soldering of TSSOP8 package SOT505-2 Solder footprint Solder footprint Hx Gx P2 (0.125) (0.125) Hy Gy By Ay C D2 (4x) P1 D1 Generic footprint pattern Refer to the package outline drawing for actual layout solder land occupied area DIMENSIONS in mm NXP Logic selection guide 2016 135 P2 P1 C Gx Hx Ay By D1 D2 Gy Hy
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Logic selection guide 2016 Standard
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Standard Logic and Mini Logic: tune
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Transceivers 120 Standard logic pac
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NXP is the #1 volume leader For the
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What is configurable logic? Configu
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Our approach to quality At NXP, we
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Low-voltage families INCREASING PER
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Special features NXP offers a varie
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SOURCE TERMINATION What it does Imp
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OVERVOLTAGE-TOLERANT OUTPUTS 3-stat
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LIVE INSERTION What it does Enables
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OPEN-DRAIN OUTPUTS Open-drain outpu
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High-voltage families This section
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HEF4000B selection table (cont.) SO
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HC(T) selection table (cont.) TSSOP
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Page 37 and 38:
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AHC(T) selection table (cont.) TSSO
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AHC(T) selection table (cont.) TSSO
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XC7 LOGIC XC7 devices are very high
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CBT(D) LOGIC CBT and CBTD bus switc
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LV selection table TSSOP SSOP SO DQ
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LVC selection table (cont.) TSSOP V
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Page 55 and 56:
ALVC selection table (cont.) TSSOP
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LVT selection table (cont.) TSSOP S
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AVC(M) LOGIC AVC and AVCM devices a
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AUP selection table (cont.) VSSOP M
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AXP LOGIC As the first logic family
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Product listing by function Analog
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Analog switches (cont.) Type number
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Buffers-inverters-drivers (cont.) T
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BUS SWITCHES Features and benefits
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Counters/frequency dividers (cont.)
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Decoders demultiplexers (cont.) Typ
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Digital multiplexers (cont.) Type n
Page 83 and 84: Flip-flops (cont.) Type number Desc
Page 85 and 86: Flip-flops (cont.) Type number Desc
Page 87 and 88: GATES This section includes AND gat
Page 89 and 90: Gates - Configurable Type number De
Page 91 and 92: Gates - NAND (cont.) Type number De
Page 93 and 94: Gates - OR (cont.) Type number Desc
Page 95 and 96: Latches-registered drivers (cont.)
Page 97 and 98: Level shifters-translators (cont.)
Page 99 and 100: PARITY GENERATORS/CHECKERS Features
Page 101 and 102: Schmitt triggers (cont.) Type numbe
Page 103 and 104: Shift registers - LED drivers (cont
Page 105 and 106: Transceivers (cont.) Type number De
Page 107 and 108: Q100 Standard Logic functions & pac
Page 109 and 110: Buffers/inverters (cont.) Features
Page 111 and 112: Counters/frequency dividers (cont.)
Page 113 and 114: Flip-flops (cont.) Features Package
Page 115 and 116: Gates (cont.) Features Package (suf
Page 117 and 118: Level shifters/translators Features
Page 119 and 120: Shift registers (cont.) Features Pa
Page 121 and 122: Standard logic packages Package suf
Page 123 and 124: Buffers/inverters (cont.) Features
Page 125 and 126: Digital decoders/demultiplexers Fea
Page 127 and 128: Gates (cont.) Features Package (suf
Page 129 and 130: Level shifters/translators Features
Page 131 and 132: The leadless advantage Today’s ul
Page 133: Nomenclature NXP's naming conventio
Page 137 and 138: SOT765-1 DC SOT833-1 GT Pinout Pino
Page 139 and 140: SOT902-2 GM SOT996 GD Pinout Pinout
Page 141 and 142: SOT1089 GF SOT1202 GS Pinout Pinout
Page 143 and 144: SOT815-1 BQ SOT402-1 PW Pinout Pino
Page 145 and 146: SOT337-1 DB SOT338-1 DB Pinout Pino
Page 147 and 148: SOT724-1 DS SOT1174 GM Pinout Pinou
Page 149 and 150: SOT556-1 DK SOT340-1 DB Pinout Pino
Page 151 and 152: Design tools NXP is committed to ma
Page 153 and 154: Evaluation board for configurable l
Page 155 and 156: Toshiba one gate IDT logic TC7 S Z
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Logic selection guide 2016

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