Logic selection guide 2016

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DIGITAL COMPARATORS Features and benefits 4 Magnitude comparison of any binary words 4 Serial or parallel expansion without extra gating 4 Low-power CMOS 4 CMOS or TTL inputs Applications 4 Process controllers 4 Servo-motor control Digital comparators Type number Description V CC (V) Logic switching levels Output drive capability (mA) t pd (ns) Output Load C L (Typ) Number of bits T amb (°C) 74HC688 8-bit magnitude comparator 2.0 to 6.0 CMOS ±5.2 17 50 pF 8 -40 to +125 74HCT688 8-bit magnitude comparator; TTL-enabled 4.5 to 5.5 TTL ±4.0 17 50 pF 8 -40 to +125 74HC85 4-bit magnitude comparator 2.0 to 6.0 CMOS ±5.2 23 50 pF 4 -40 to +125 74HCT85 4-bit magnitude comparator; TTL-enabled 4.5 to 5.5 TTL ±4.0 26 50 pF 4 -40 to +125 HEF4585 4-bit magnitude comparator 4.5 to 15.5 CMOS ±2.4 65 50 pF 4 -40 to +85 DIGITAL MULTIPLEXERS Features and benefits 4 Mixed 3.3/5 V applications 4 Bus-width reduction 4 High noise immunity 4 Low power consumption 4 Wide range of supply voltages 4 Low propagation delay 4 Optional overvoltage-tolerant inputs, complementary outputs Applications 4 Power windows, power locks, power mirror control 4 Advanced diagnostics and engine control modules 4 Industrial control systems 4 Decision-making via voltage sensing in portable electronics 4 I/O expansion Digital multiplexers (cont.) Type number Description V CC (V) Logic switching levels Output drive capability (mA) Output Load CL (Typ) t pd (ns) T amb (°C) 74AHC157 Quad 2-input multiplexer 2.0 to 5.5 CMOS ±8 50 pF 3.2 74AHCT157 Quad 2-input multiplexer; TTL-enabled 4.5 to 5.5 TTL ±8 50 pF 3.2 -40 to +125 74AHC257 Quad 2-input multiplexer (3-state) 2.0 to 5.5 CMOS ±8 50 pF 2.9 -40 to +125 74AHCT257 Quad 2-input multiplexer; TTL-enabled (3-state) 4.5 to 5.5 TTL ±8 50 pF 3.7 -40 to +125 74AUP1G157 Single 2-input multiplexer 1.1 to 3.6 CMOS 1.9/-1.9 30 pF 3.2 -40 to +125 74AUP1G158 Single 2-input multiplexer; inverting 1.1 to 3.6 CMOS 1.9/-1.9 30 pF 3.2 -40 to +125 74AUP2G157 Single 2-input multiplexer 1.1 to 3.6 CMOS 1.9/-1.9 30 pF 3.4 -40 to +125 74HC151 8-input multiplexer 2.0 to 6.0 CMOS ±5.2 50 pF 17 -40 to +125 Note: Selected package types only. Complete package listings are in the previous section and online at www.nxp.com/logic. 80 NXP Logic selection guide 2016
Digital multiplexers (cont.) Type number Description V CC (V) Logic switching levels Output drive capability (mA) Output Load CL (Typ) t pd (ns) T amb (°C) 74HCT151 8-input multiplexer; TTL-enabled 4.5 to 5.5 TTL ±4 50 pF 19 -40 to +125 74HC153 Dual 4-input multiplexer 2.0 to 6.0 CMOS ±5.2 50 pF 17 -40 to +125 74HCT153 Dual 4-input multiplexer; TTL-enabled 4.5 to 5.5 TTL ±4 50 pF 19 -40 to +125 74HC157 Quad 2-input multiplexer 2.0 to 6.0 CMOS ±5.2 50 pF 11 -40 to +125 74HCT157 Quad 2-input multiplexer; TTL-enabled 4.5 to 5.5 TTL ±4 50 pF 13 -40 to +125 74HC251 8-input multiplexer (3-state) 2.0 to 6.0 CMOS ±5.2 50 pF 18 -40 to +125 74HCT251 8-input multiplexer; TTL-enabled (3-state) 4.5 to 5.5 TTL ±4 50 pF 22 -40 to +125 74HC253 Dual 4-input multiplexer (3-state) 2.0 to 6.0 CMOS ±7.8 50 pF 17 -40 to +125 74HCT253 Dual 4-input multiplexer; TTL-enabled (3-state) 4.5 to 5.5 TTL ±6 50 pF 17 -40 to +125 74HC257 Quad 2-input multiplexer (3-state) 2.0 to 6.0 CMOS ±7.8 50 pF 11 -40 to +125 74HCT257 Quad 2-input multiplexer; TTL-enabled (3-state) 4.5 to 5.5 TTL ±6 50 pF 13 -40 to +125 74HC158 Quad 2-input multiplexer; inverting 2.0 to 6.0 CMOS ±5.2 50 pF 12 -40 to +125 74LV153 Dual 4-input multiplexer 1.0 to 3.6 TTL ±6 50 pF 14 -40 to +125 74LV251 8-input multiplexer (3-state) 1.0 to 3.6 TTL ±6 50 pF 17 -40 to +125 74LVC157 Quad 2-input multiplexer 1.2 to 3.6 CMOS/ LVTTL ±24 50 pF 2,5 -40 to +125 74LVC1G157 Single 2-input multiplexer 1.65 to 5.5 CMOS/ LVTTL ±32 50 pF 2,2 -40 to +125 74LVC257 Quad 2-input multiplexer (3-state) 1.2 to 3.6 CMOS/ LVTTL ±24 50 pF 2,4 -40 to +125 ENCODERS Features and benefits 4 Encode 10-line decimal to 4-line BCD 4 Standard output capability 4 Applications 4 LED, LCD, incandescent, fluorescent, or gas-discharge displays 4 10-position switch encoding 4 Code converters, generators Encoders Type number Description V CC (V) Logic switching levels Output drive capability (mA) t pd (ns) Number of bits T amb (°C) Package name 74HCT147 10-to-4 line priority encoder; TTL-enabled 4.5 to 5.5 TTL ±4 17 10 -40 to +125 SOT109-1 Note: Selected package types only. Complete package listings are in the previous section and online at www.nxp.com/logic. NXP Logic selection guide 2016 81
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Logic selection guide 2016 Standard
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Standard Logic and Mini Logic: tune
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Transceivers 120 Standard logic pac
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NXP is the #1 volume leader For the
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What is configurable logic? Configu
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Our approach to quality At NXP, we
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Low-voltage families INCREASING PER
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Special features NXP offers a varie
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SOURCE TERMINATION What it does Imp
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OVERVOLTAGE-TOLERANT OUTPUTS 3-stat
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LIVE INSERTION What it does Enables
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OPEN-DRAIN OUTPUTS Open-drain outpu
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High-voltage families This section
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HEF4000B selection table (cont.) SO
Page 29 and 30: HC(T) selection table (cont.) TSSOP
Page 39 and 40: AHC(T) selection table (cont.) TSSO
Page 41 and 42: AHC(T) selection table (cont.) TSSO
Page 43 and 44: XC7 LOGIC XC7 devices are very high
Page 45 and 46: CBT(D) LOGIC CBT and CBTD bus switc
Page 47 and 48: LV selection table TSSOP SSOP SO DQ
Page 49 and 50: LVC selection table (cont.) TSSOP V
Page 55 and 56: ALVC selection table (cont.) TSSOP
Page 57 and 58: LVT selection table (cont.) TSSOP S
Page 59 and 60: AVC(M) LOGIC AVC and AVCM devices a
Page 61 and 62: AUP selection table (cont.) VSSOP M
Page 63 and 64: AXP LOGIC As the first logic family
Page 65 and 66: Product listing by function Analog
Page 67 and 68: Analog switches (cont.) Type number
Page 69 and 70: Buffers-inverters-drivers (cont.) T
Page 75 and 76: BUS SWITCHES Features and benefits
Page 77 and 78: Counters/frequency dividers (cont.)
Page 79: Decoders demultiplexers (cont.) Typ
Page 83 and 84: Flip-flops (cont.) Type number Desc
Page 85 and 86: Flip-flops (cont.) Type number Desc
Page 87 and 88: GATES This section includes AND gat
Page 89 and 90: Gates - Configurable Type number De
Page 91 and 92: Gates - NAND (cont.) Type number De
Page 93 and 94: Gates - OR (cont.) Type number Desc
Page 95 and 96: Latches-registered drivers (cont.)
Page 97 and 98: Level shifters-translators (cont.)
Page 99 and 100: PARITY GENERATORS/CHECKERS Features
Page 101 and 102: Schmitt triggers (cont.) Type numbe
Page 103 and 104: Shift registers - LED drivers (cont
Page 105 and 106: Transceivers (cont.) Type number De
Page 107 and 108: Q100 Standard Logic functions & pac
Page 109 and 110: Buffers/inverters (cont.) Features
Page 111 and 112: Counters/frequency dividers (cont.)
Page 113 and 114: Flip-flops (cont.) Features Package
Page 115 and 116: Gates (cont.) Features Package (suf
Page 117 and 118: Level shifters/translators Features
Page 119 and 120: Shift registers (cont.) Features Pa
Page 121 and 122: Standard logic packages Package suf
Page 123 and 124: Buffers/inverters (cont.) Features
Page 125 and 126: Digital decoders/demultiplexers Fea
Page 127 and 128: Gates (cont.) Features Package (suf
Page 129 and 130: Level shifters/translators Features
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The leadless advantage Today’s ul
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Nomenclature NXP's naming conventio
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SOT457 GV SOT505-2 DP Pinout Pinout
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SOT765-1 DC SOT833-1 GT Pinout Pino
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SOT902-2 GM SOT996 GD Pinout Pinout
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SOT1089 GF SOT1202 GS Pinout Pinout
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SOT815-1 BQ SOT402-1 PW Pinout Pino
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SOT337-1 DB SOT338-1 DB Pinout Pino
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SOT724-1 DS SOT1174 GM Pinout Pinou
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SOT556-1 DK SOT340-1 DB Pinout Pino
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Design tools NXP is committed to ma
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Evaluation board for configurable l
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Toshiba one gate IDT logic TC7 S Z
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