Logic selection guide 2016

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SOT403-1 PW SOT360-1 PW Pinout Pinout 1 20 1 16 2 19 2 15 3 18 3 14 4 17 4 13 5 16 5 12 6 15 6 11 7 14 7 10 8 13 8 9 9 12 aaa-019012 10 11 aaa-019015 Package dimensions Package dimensions Solder footprint Solder footprint 144 NXP Logic selection guide 2016
SOT337-1 DB SOT338-1 DB Pinout Pinout 1 14 2 13 3 12 4 11 5 10 6 9 7 8 aaa-018999 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 aaa-019007 Package dimensions Package dimensions 1 14 7 8 Dimensions in mm 15-05-26 Solder footprint Solder footprint NXP Logic selection guide 2016 145
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Logic selection guide 2016 Standard
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Standard Logic and Mini Logic: tune
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Transceivers 120 Standard logic pac
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NXP is the #1 volume leader For the
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What is configurable logic? Configu
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Our approach to quality At NXP, we
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Low-voltage families INCREASING PER
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Special features NXP offers a varie
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SOURCE TERMINATION What it does Imp
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OVERVOLTAGE-TOLERANT OUTPUTS 3-stat
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LIVE INSERTION What it does Enables
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OPEN-DRAIN OUTPUTS Open-drain outpu
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High-voltage families This section
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HEF4000B selection table (cont.) SO
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HC(T) selection table (cont.) TSSOP
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AHC(T) selection table (cont.) TSSO
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AHC(T) selection table (cont.) TSSO
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XC7 LOGIC XC7 devices are very high
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CBT(D) LOGIC CBT and CBTD bus switc
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LV selection table TSSOP SSOP SO DQ
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LVC selection table (cont.) TSSOP V
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ALVC selection table (cont.) TSSOP
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LVT selection table (cont.) TSSOP S
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AVC(M) LOGIC AVC and AVCM devices a
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AUP selection table (cont.) VSSOP M
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AXP LOGIC As the first logic family
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Product listing by function Analog
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Analog switches (cont.) Type number
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Buffers-inverters-drivers (cont.) T
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BUS SWITCHES Features and benefits
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Counters/frequency dividers (cont.)
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Decoders demultiplexers (cont.) Typ
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Digital multiplexers (cont.) Type n
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Flip-flops (cont.) Type number Desc
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Flip-flops (cont.) Type number Desc
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GATES This section includes AND gat
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Gates - Configurable Type number De
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Gates - NAND (cont.) Type number De
Page 93 and 94: Gates - OR (cont.) Type number Desc
Page 95 and 96: Latches-registered drivers (cont.)
Page 97 and 98: Level shifters-translators (cont.)
Page 99 and 100: PARITY GENERATORS/CHECKERS Features
Page 101 and 102: Schmitt triggers (cont.) Type numbe
Page 103 and 104: Shift registers - LED drivers (cont
Page 105 and 106: Transceivers (cont.) Type number De
Page 107 and 108: Q100 Standard Logic functions & pac
Page 109 and 110: Buffers/inverters (cont.) Features
Page 111 and 112: Counters/frequency dividers (cont.)
Page 113 and 114: Flip-flops (cont.) Features Package
Page 115 and 116: Gates (cont.) Features Package (suf
Page 117 and 118: Level shifters/translators Features
Page 119 and 120: Shift registers (cont.) Features Pa
Page 121 and 122: Standard logic packages Package suf
Page 123 and 124: Buffers/inverters (cont.) Features
Page 125 and 126: Digital decoders/demultiplexers Fea
Page 127 and 128: Gates (cont.) Features Package (suf
Page 129 and 130: Level shifters/translators Features
Page 131 and 132: The leadless advantage Today’s ul
Page 133 and 134: Nomenclature NXP's naming conventio
Page 135 and 136: SOT457 GV SOT505-2 DP Pinout Pinout
Page 137 and 138: SOT765-1 DC SOT833-1 GT Pinout Pino
Page 139 and 140: SOT902-2 GM SOT996 GD Pinout Pinout
Page 141 and 142: SOT1089 GF SOT1202 GS Pinout Pinout
Page 143: SOT815-1 BQ SOT402-1 PW Pinout Pino
Page 147 and 148: SOT724-1 DS SOT1174 GM Pinout Pinou
Page 149 and 150: SOT556-1 DK SOT340-1 DB Pinout Pino
Page 151 and 152: Design tools NXP is committed to ma
Page 153 and 154: Evaluation board for configurable l
Page 155 and 156: Toshiba one gate IDT logic TC7 S Z
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