Logic selection guide 2016

OVERVOLTAGE-TOLERANT OUTPUTS
3-state CMOS output
3-stated outputs prevent a current path from the
output to the supply voltage when a voltage higher
than the supply voltage is applied to the output. In
some applications, such as mixed-voltage multi-drop
backplane applications, there is a risk of data contention
and even damage due to clamping caused by 3-state
outputs that are not overvoltage-tolerant. The AUP,
AVC(M), AXP, and LVC logic families all have overvoltagetolerant
3-state CMOS outputs that switch the back gate
of the PMOS output driver to V CC
or the output voltage,
whichever is higher.
V CC
1
3-State
0
Simplified CMOS Input
Bus
D G S+BG
P N P
Parasitic diode to V CC
Overvoltage protection provided by 3-state CMOS output
3-state BiCMOS output
V CC
The LVT and ALVT families have overvoltage-tolerant
3-state BiCMOS outputs. A Schottky diode between
V CC
and the back gate prevents current flow to V CC
. The
Comparator
V OUT
BiCMOS outputs also include self-protection. The output
is set to 3-state when V OUT
> V CC
+ 0.5 V.
OE
IN
CMOS portion of BICMOS output
Overvoltage protection provided by 3-state CMOS output
POWER-OFF LEAKAGE (I OFF ) CIRCUITRY
What it does
Prevents potentially damaging leakage paths through
the device when it’s powered down.
Why it’s important
Enables power-management strategies to use partial
power-down of subsystems, saves energy in batterypowered
applications, and prevents damage to devices
in telecommunications-infrastructure applications.
Poweroff
leakage
(I OFF
)
circuitry
5 V 3.3 V 2.5 V 1.8 V 1.2 V 0.8 V
LVC
LVC,
ALVC,
LVT,
ALVT,
AVC(M),
AUP
LVC,
ALVC,
ALVT,
AVC(M),
AUP,
AXP
Bus
LVC,
ALVC,
AVC(M),
AUP,
AXP
AVC(M),
AUP,
AXP
V CC2
AXP
Where you’ll find it
The following families, in alphabetical order, include
power-off leakage (I OFF
) circuitry: ALVC, ALVT, AVC(M),
AUP, AXP, LVC, and LVT.
V CC1
= 0
AUP1G08
I off
Device 1
I off
V CC3
I off
Device 2
Disabling power using the I OFF
feature
NXP Logic selection guide 2016
19