Logic selection guide 2016

Flip-flops (cont.)
Type number Description V CC
(V)
74LV174
74LV273
74LV374
74LV377
74LV574
74LV74
74LVC16374
74LVCH16374
74LVC109
74LVC1G175
74LVC1G74
Hex D-type flip-flop with reset; positive-edge
trigger
Octal D-type flip-flop with reset; positive-edge
trigger
Octal D-type flip-flop; positive-edge trigger
(3-state)
Octal D-type flip-flop with data enable; positiveedge
trigger
Octal D-type flip-flop; positive-edge trigger
(3-state)
Dual D-type flip-flop with set and reset; positiveedge
trigger
16-bit D-type flip-flop; positive-edge trigger
(3-state)
16-bit D-type flip-flop with bus hold; positiveedge
trigger (3-state)
Dual JK-type flip-flop with set and reset;
positive-edge trigger
Single D flip-flop with reset; positive-edge
trigger
Single D-type flip-flop with set and reset;
positive-edge trigger
Logic
switching
levels
Output
drive
capability
(mA)
t pd
(ns)
Output
Load
C L (Typ)
f max
(MHz)
T amb
(°C)
1.0 to 5.5 TTL ±12 16 50 pF 77 -40 to +125
1.0 to 5.5 TTL ±12 12 50 pF 110 -40 to +125
1.0 to 5.5 TTL ±16 14 50 pF 77 -40 to +125
1.0 to 3.6 TTL ±6 13 50 pF 77 -40 to +125
1.0 to 5.5 TTL ±16 13 50 pF 77 -40 to +125
1.0 to 5.5 TTL ±12 11 50 pF 75 -40 to +125
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.65 to 5.5
1.65 to 5.5
74LVC1G79 Single D-type flip-flop; positive-edge trigger 1.65 to 5.5
74LVC1G80 Single D-type flip-flop; positive-edge trigger 1.65 to 5.5
74LVC273
74LVC2G74
74LVC374
74LVC377
74LVC574
74LVC74
74LVC821
74LVC823
74LVCH162374
74LVCH32374
74LVT16374
74LVTH16374
Octal D-type flip-flop with reset; positive-edge
trigger
Single D-type flip-flop with set and reset;
positive-edge trigger
Octal D-type flip-flop; positive-edge trigger
(3-state)
Octal D-type flip-flop with data enable; positiveedge
trigger
Octal D-type flip-flop; positive-edge trigger
(3-state)
Dual D-type flip-flop with set and reset; positiveedge
trigger
10-bit D-type flip-flop; positive-edge trigger
(3-state)
9-bit D-type flip-flop; positive-edge trigger
(3-state)
16-bit D-type flip-flop with bus hold and
30 Ω termination resistors; positive-edge trigger
(3-state)
32-bit D-type flip-flop with bus hold; positiveedge
trigger (3-state)
16-bit D-type flip-flop with bus hold; positiveedge
trigger (3-state)
16-bit D-type flip-flop with bus hold; positiveedge
trigger (3-state)
1.2 to 3.6
1.65 to 5.5
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
1.2 to 3.6
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
CMOS/
LVTTL
±24 3,8 50 pF 150 -40 to +125
±24 3,8 50 pF 150 -40 to +125
±24 4 50 pF 330 -40 to +125
±32 3,1 50 pF 300 -40 to +125
±32 3,5 50 pF 280 -40 to +125
±32 2,2 50 pF 450 -40 to +125
±32 2,4 50 pF 450 -40 to +125
±24 6 50 pF 230 -40 to +125
±32 3,5 50 pF 280 -40 to +125
±24 2,7 50 pF 100 -40 to +125
±24 6 50 pF 230 -40 to +125
±24 3,2 50 pF 150 -40 to +125
±24 2,5 50 pF 250 -40 to +125
±24 5,4 50 pF 150 -40 to +125
±24 5,4 50 pF 150 -40 to +125
±24 3,8 50 pF 150 -40 to +125
±24 3,8 50 pF 150 -40 to +125
2.7 to 3.6 TTL -32/+64 3 50 pF 150 -40 to +85
2.7 to 3.6 TTL -32/+64 3 50 pF 150 -40 to +85
Note: Selected package types only. Complete package listings are in the previous section and online at www.nxp.com/logic.
NXP Logic selection guide 2016
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