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Logic selection guide 2016

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ALVT LOGIC<br />

The ALVT family is a speed upgrade for the LVT family. It<br />

combines the low power dissipation and low noise of CMOS<br />

with the high speed and high output drive of bipolar products.<br />

ALVT devices exhibit highly stable static and dynamic<br />

characteristics over a wide temperature range, are specified<br />

over 2.7 to 3.6 V, and support live insertion. With output drive<br />

as high as 64 mA and typical propagation delay of 2 ns, these<br />

devices are well suited for parallel-backplane applications.<br />

They are fully specified from -40 °C to 85 °C.<br />

Features and benefits<br />

4 Typical propagation delay of 1.5 ns<br />

4 Output drive capability I OH<br />

/ I OL<br />

= -32/+64 mA<br />

4 Supply voltage range V CC<br />

= 2.7 to 3.6 V<br />

4 5 V-tolerant I/O<br />

4 Bus hold on data inputs<br />

4 Power-up/power-down 3-state<br />

4 Live insertion<br />

4 Buffers and drivers with 30 Ω integrated series termination<br />

(optional)<br />

Applications<br />

4 Backplane drivers<br />

4 Workstations<br />

4 Telecom and networking equipment<br />

4 Advanced bus interfaces<br />

4 Computer peripherals<br />

ALVT <strong>selection</strong> table TSSOP SSOP<br />

Type<br />

number<br />

Function<br />

Description<br />

Suffix<br />

DGG<br />

Suffix<br />

DL<br />

74ALVT162240 Buffer/inverter/driver 16-bit inverter/line driver with bus hold and 30 Ω termination (3-state) • •<br />

74ALVT162241 Buffer/inverter/driver 16-bit buffer/line driver with bus hold and 30 Ω termination resistors (3-state) • •<br />

74ALVT162244 Buffer/inverter/driver 16-bit buffer/line driver with bus hold and 30 Ω termination resistors (3-state) • •<br />

74ALVT162245 Transceiver 16-bit transceiver with bus hold and 30 Ω termination resistors (3-state) • •<br />

74ALVT16240 Buffer/inverter/driver 16-bit inverter/line driver with bus hold (3-state) • •<br />

74ALVT16241 Buffer/inverter/driver 16-bit buffer/line driver with bus hold (3-state) • •<br />

74ALVT16244 Buffer/inverter/driver 16-bit buffer/line driver with bus hold (3-state) • •<br />

74ALVT16245 Transceiver 16-bit transceiver with bus hold (3-state) • •<br />

74ALVT16260 Latch/registered driver 12-bit to 24-bit multiplexed D-type latch with bus hold (3-state) • •<br />

74ALVT162821 D-type flip-flop 20-bit D-type flip-flop; positive-edge trigger (3-state) • •<br />

74ALVT162823 D-type flip-flop 18-bit buffer/line driver with bus hold and 30 Ω termination resistors (3-state) • •<br />

74ALVT162827 Buffer/inverter/driver 20-bit buffer/line driver with bus hold and 30 Ω termination resistors (3-state) • •<br />

74ALVT16373 Latch/registered driver 16-bit D-type transparent latch with bus hold (3-state) • •<br />

74ALVT16374 D-type flip-flop 16-bit D-type flip-flop with bus hold; positive-edge trigger (3-state) • •<br />

74ALVT16501 Transceiver 18-bit universal bus transceiver with bus hold; positive edge trigger (3-state) • •<br />

74ALVT16543 Transceiver 16-bit registered transceiver with bus hold (3-state) • •<br />

74ALVT16601 Transceiver 18-bit universal bus transceiver with bus hold; positive edge trigger (3-state) • •<br />

74ALVT16652 Transceiver 16-bit registered transceiver with bus hold (3-state) • •<br />

74ALVT16821 D-type flip-flop 20-bit D-type flip-flop; positive-edge trigger (3-state) • •<br />

74ALVT16823 D-type flip-flop 18-bit D-type flip-flop with bus hold; positive-edge trigger (3-state) • •<br />

74ALVT16827 Buffer/inverter/driver 20-bit buffer/line driver with bus hold (3-state) • •<br />

58 NXP <strong>Logic</strong> <strong>selection</strong> <strong>guide</strong> <strong>2016</strong>

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