Logic selection guide 2016
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GATES<br />
This section includes AND gates, combination gates (one<br />
package, two or more different functions), configurable<br />
multi-function gates (one package, nine or more functions),<br />
EXCLUSIVE-NOR gates, EXCLUSIVE-OR gates, NOR gates,<br />
and OR gates.<br />
Features and benefits<br />
4 Mixed 3.3/5 V applications<br />
4 Reduced time-to-market for complex designs<br />
4 Reduced board space<br />
4 Improved signal integrity in complex layouts<br />
4 Wide range of supply voltages<br />
4 Low propagation delay<br />
4 Low-power CMOS<br />
4 Optional overvoltage-tolerant inputs, low input threshold<br />
4 Comprehensive range: AND, EXCLUSIVE-NOR,<br />
EXCLUSIVE-OR, NAND, NOR, OR<br />
4 Combination gates and configurable multi-function gates<br />
for lower pincount, device count, system cost, assemblyrelated<br />
expenses<br />
Applications<br />
4 Control/glue logic<br />
4 PCB miniaturization<br />
4 Routing simplification<br />
4 Discrete replacement<br />
Gates - AND (cont.)<br />
Type number Description V CC<br />
(V)<br />
<strong>Logic</strong><br />
switching<br />
levels<br />
Output<br />
drive<br />
capability<br />
(mA)<br />
t pd<br />
(ns)<br />
Output<br />
Load<br />
C L (Typ)<br />
f max<br />
(MHz)<br />
Number<br />
of bits<br />
T amb<br />
(°C)<br />
74AHC08 Quad 2-input AND gate 2.0 to 5.5 CMOS ±8 3.5 50 pF 60 4 -40 to +125<br />
74AHC1G08 Single 2-input AND gate 2.0 to 5.5 CMOS ±8 3.2 50 pF 60 1 -40 to +125<br />
74AHC1G09<br />
Single 2-input AND gate;<br />
open drain<br />
2.0 to 5.5 CMOS ±8 3.2 50 pF 60 1 -40 to +125<br />
74AHC2G08 Dual 2-input AND gate 2.0 to 5.5 CMOS ±8 3.2 50 pF 60 2 -40 to +125<br />
74AHCT08<br />
74AHCT1G08<br />
74AHCT2G08<br />
Quad 2-input AND gate;<br />
TTL-enabled<br />
Single 2-input AND gate;<br />
TTL-enabled<br />
Dual 2-Input AND gate;<br />
TTL-enabled<br />
4.5 to 5.5 TTL ±8 5 50 pF 60 4 -40 to +125<br />
4.5 to 5.5 TTL ±8 3.6 50 pF 60 1 -40 to +125<br />
4.5 to 5.5 TTL ±8 3.6 50 pF 60 2 -40 to +125<br />
74ALVC08 Quad 2-input AND gate 1.65 to 3.6 TTL ±24 2 50 pF 145 4 -40 to +85<br />
74AUP1G08 Single 2-input AND gate 1.1 to 3.6 CMOS ±1.9 8.2 30 pF 70 1 -40 to +125<br />
74AUP1G09<br />
Single 2-input AND gate;<br />
open drain<br />
1.1 to 3.6 CMOS 1,9 8.5 30 pF 70 1 -40 to +125<br />
74AUP1G11 Single 3-input AND gate 1.1 to 3.6 CMOS ±1.9 6.9 30 pF 70 1 -40 to +125<br />
74AUP2G08 Dual 2-input AND gate 1.1 to 3.6 CMOS ±1.9 8.2 30 pF 70 2 -40 to +125<br />
74AXP1G08 Single 2-input AND gate 0.7 to 2.75 CMOS ±4.5 2.6 5pF 70 1 -40 to +85<br />
74HC08 Quad 2-input AND gate 2.0 to 6.0 CMOS ±5.2 7 50 pF 36 4 -40 to +125<br />
74HC11 Triple 3-input AND gate 2.0 to 6.0 CMOS ±5.2 10 50 pF 36 3 -40 to +125<br />
74HC1G08 Single 2-input AND gate 2.0 to 6.0 CMOS ±5.2 7 50 pF 36 1 -40 to +125<br />
74HC21 Dual 4-input AND gate 2.0 to 6.0 CMOS ±5.2 10 50 pF 36 2 -40 to +125<br />
74HC2G08 Dual 2-input AND gate 2.0 to 6.0 CMOS ±5.2 9 50 pF 36 2 -40 to +125<br />
74HCT08<br />
Quad 2-input AND gate;<br />
TTL-enabled<br />
4.5 to 5.5 TTL ±4 11 50 pF 36 4 -40 to +125<br />
74HCT11 Triple 3-input AND gate 4.5 to 5.5 TTL ±4 11 50 pF 36 3 -40 to +125<br />
74HCT1G08<br />
74HCT1G08<br />
Single 2-input AND gate;<br />
TTL-enabled<br />
Single 2-input AND gate;<br />
TTL-enabled<br />
4.5 to 5.5 TTL ±2 11 50 pF 36 1 -40 to +125<br />
4.5 to 5.5 TTL ±2 11 50 pF 36 1 -40 to +125<br />
Note: Selected package types only. Complete package listings are in the previous section and online at www.nxp.com/logic.<br />
NXP <strong>Logic</strong> <strong>selection</strong> <strong>guide</strong> <strong>2016</strong><br />
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