Logic selection guide 2016

Gates - AND (cont.)
Type number Description V CC
(V)
74HCT2G08
Dual 2-Input AND gate;
TTL-enabled
Logic
switching
levels
Output
drive
capability
(mA)
t pd
(ns)
Output
Load
C L (Typ)
f max
(MHz)
Number
of bits
T amb
(°C)
4.5 to 5.5 TTL ±4 14 50 pF 36 2 -40 to +125
74LV08 Quad 2-input AND gate 1.0 to 5.5 TTL ±12 7 50 pF 30 4 -40 to +125
74LVC08 Quad 2-input AND gate 1.2 to 3.6 TTL ±24 2.1 50 pF 150 4 -40 to +125
74LVC11 Triple 3-input AND gate 1.2 to 3.6 TTL ±24 3.7 50 pF 150 3 -40 to +125
74LVC1G08 Single 2-input AND gate 1.65 to 5.5
74LVC1G11 Single 3-input AND gate 1.65 to 5.5
74LVC2G08 Dual 2-input AND gate 1.65 to 5.5
CMOS /
LVTTL
CMOS /
LVTTL
CMOS /
LVTTL
±24 2.1 50 pF 150 1 -40 to +125
±24 2.6 50 pF 150 1 -40 to +125
±24 2.1 50 pF 150 2 -40 to +125
74LVT08 Quad 2-input AND gate 2.7 to 3.6 TTL -32/+64 3.4 50 pF 150 4 -40 to +85
74VHC08 Quad 2-input AND gate 2.0 to 5.5 CMOS ±8 3.5 50 pF 60 4 -40 to +125
74VHCT08
Quad 2-input AND gate;
TTL-enabled
4.5 to 5.5 TTL ±8 5 50 pF 60 4 -40 to +125
HEF4073 Triple 3-input AND gate 4.5 to 15.5 CMOS ±2.4 20 50 pF 10 3 -40 to +85
HEF4081 Quad 2-input AND gate 4.5 to 15.5 CMOS ±2.4 20 50 pF 10 4 -40 to +85
HEF4082 Dual 4-input AND gate 4.5 to 15.5 CMOS ±2.4 25 50 pF 10 2 -40 to +85
XC7SET08
Single 2-input AND gate;
TTL-enabled
4.5 to 5.5 TTL ±8 3.6 50 pF 60 1 -40 to +125
XC7SH08 Single 2-input AND gate 2.0 to 5.5 CMOS ±8 3.2 50 pF 60 1 -40 to +125
Gates - Combination
Type number Description V CC
(V)
Logic
switching
levels
Output
drive
capability
(mA)
t pd
(ns)
Output
Load
C L (Typ)
f max
(MHz)
Number
of bits
T amb
(°C)
74AUP1G0832 Single 3-input AND-OR gate 1.1 to 3.6 CMOS ±1.9 6.7 30 pF 70 1 -40 to +125
74AUP1G3208 Single 3-input OR-AND gate 1.1 to 3.6 CMOS ±1.9 7.4 30 pF 70 1 -40 to +125
74AUP1G885 Dual function gate 1.1 to 3.6 CMOS ±1.9 7.6 30 pF 70 1 -40 to +125
74AUP1Z04
74AUP1Z125
74AUP2G0604
Crystal driver with enable and
internal resistor
Crystal driver with enable and
internal resistor (3-state)
Inverter with open drain and
inverter
1.1 to 3.6 CMOS ±1.9 5.6 30 pF 70 1 -40 to +125
1.1 to 3.6 CMOS ±1.9 4.7 30 pF 70 1 -40 to +125
1.1 to 3.6 CMOS ±1.9 4 30 pF 70 2 -40 to +125
74AUP2G3404 Buffer and inverter 1.1 to 3.6 CMOS ±1.9 4 30 pF 70 2 -40 to +125
74AUP2G3407 Buffer and buffer with open drain 1.1 to 3.6 CMOS ±1.9 4.1 30 pF 70 2 -40 to +125
74AUP2T1326
Dual supply buffer/line driver;
3-state
1.1 to 3.6 CMOS ±1.9 3.8 30 pF 70 2 -40 to +125
74AUP3G0434 Dual inverter and single buffer 1.1 to 3.6 CMOS ±1.9 4 30 pF 70 3 -40 to +125
74AUP3G3404 Dual buffer and single inverter 1.1 to 3.6 CMOS ±1.9 4 30 pF 70 3 -40 to +125
74HC58 Dual AND-OR gate 2.0 to 6.0 CMOS ±5.2 9 50 pF 36 2 -40 to +125
74LVC1GX04 Crystal driver 1.65 to 5.5
CMOS /
LVTTL
±24 2.8 50 pF 150 1 -40 to +125
HEF4000 Dual 3-input NOR gate 4.5 to 15.5 CMOS ±2.4 30 50 pF 10 2 -40 to +85
HEF4007
Dual complementary pair and
inverter
4.5 to 15.5 CMOS ±3.4 15 50 pF 10 2 -40 to +85
Note: Selected package types only. Complete package listings are in the previous section and online at www.nxp.com/logic.
88 NXP Logic selection guide 2016