PXA3xx Boot ROM Reference Manual - Marvell

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PXA3xx Processors and Tavor ProcessorBoot ROM Reference ManualTable 45: Return Codes and Definitions (Continued)#define DFCSingleBitError0x41#define DFCCS0BadBlockDetected0x42#define DFCCS1BadBlockDetected0x43#defineDFCInitFailed0x44// Security Related Errors 0x60 - 0x8F#define InvalidOEMVerifyKeyError0x60#define InvalidOBMImageError0x61#define SecureBootFailureError0x62#define InvalidSecureBootMethodError0x63#define UnsupportedFlashError0x64#define InvalidCaddoFIFOEntryError0x65#define InvalidCaddoKeyNumberError0x66#define InvalidCaddoKeyTypeError0x67#define RSADigitalSignatureDecryptError 0x68#define InvalidHashValueLengthError0x69#define InvalidTIMImageError0x6A#define HashSizeMismatch0x6B#define InvalidKeyHashError0x6C#define TIMNotFound0x6D#define WTMStateError0x6E#define FuseRWError0x6F#define InvalidOTPHashError0x70#define CRCFailedError0x71#define SaveStateNotFound0x72#define WTMInitializationError0x73#define ImageNotFound0x74#define InvalidImageHash0x75#define MicroCodePatchingError0x76#define SetJtagKeyError0x77#define WTMDisabled0x78// Download Protocols 0x90 - 0xAF#define DownloadPortError0x90#define DownloadError0x91#define FlashNotErasedError0x9212345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 108
Table 45: Return Codes and Definitions (Continued)#define InvalidKeyLengthError0x93#define DownloadImageTooBigError0x94#define UsbPreambleError0x95#define TimeOutError0x96#define UartReadWriteTimeOutError0x97#define UnknownImageError0x98#define MessageBufferFullError0x99#define NoEnumerationResponseTimeOutError 0x9A#define UnknownProtocolCmd0x9B//JTAG ReEnable Error Codes0xB0 - 0xCF#define JtagReEnableError0xB0#define JtagReEnableOEMPubKeyError0xB1#define JtagReEnableOEMSignedPassWdError 0xB2#define JtagReEnableTimeOutError0xB3#define JtagReEnableOEMKeyLengthError 0xB4//SD/MMC Error Codes0xD0 - 0xE2#define SDMMC_SWITCH_ERROR0xD0#define SDMMC_ERASE_RESET_ERROR 0xD1#define SDMMC_CIDCSD_OVERWRITE_ERROR 0xD2#define SDMMC_OVERRUN_ERROR0xD3#define SDMMC_UNDERUN_ERROR0xD4#define SDMMC_GENERAL_ERROR0xD5#define SDMMC_CC_ERROR0xD6#define SDMMC_ECC_ERROR0xD7#define SDMMC_ILL_CMD_ERROR0xD8#define SDMMC_COM_CRC_ERROR0xD9#define SDMMC_LOCK_ULOCK_ERROR 0xDA#define SDMMC_LOCK_ERROR0xDB#define SDMMC_WP_ERROR0xDC#define SDMMC_ERASE_PARAM_ERROR 0xDD#define SDMMC_ERASE_SEQ_ERROR0xDE#define SDMMC_BLK_LEN_ERROR0xDF#define SDMMC_ADDR_MISALIGN_ERROR 0xE0#define SDMMC_ADDR_RANGE_ERROR 0xE112345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 109
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CoverMarvell® PXA3xx Processors an
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Table of Contents1 Boot ROM Functio
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6.3.5 USB Vendor Request Package ..
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Figure 1:PXA3xx Top Level Boot ROM
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Table 42: Host Commands ...........
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1 Boot ROM Functional Overview1.1 G
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Figure 1:PXA3xx Top Level Boot ROM
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Boot ROM Differences2 Boot ROM Diff
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Boot ROM DifferencesTIM/NTIM/OBM Su
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Boot ROM DifferencesPXA31x and Tavo
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Boot ROM DifferencesPXA31x and Tavo
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3 Software RequirementsThis chapter
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Typedef struct S_Reloc{USHORT Heade
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4 Methods for Platform Provisioning
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4. If the same OEM boot module is u
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multiple versions of the Device Key
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PXA3xx Processor and Tavor Processo
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PXA3xx Boot ROM Reference Manual - Marvell

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