PXA3xx Boot ROM Reference Manual - Marvell

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PXA3xx Processor and Tavor ProcessorBoot ROM Reference ManualDoc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 22
3 Software RequirementsThis chapter lists the requirements that must be performed by the OBM for the NAND and NORplatforms.3.1 Size Restrictions for the Device Keying BinaryThe Device Keying Binary should be restricted in size, based on the available internal SRAM on theprocessor used. Refer to the internal SRAM usage in Section 2.3.1, “ISRAM Usage”. Marvellsuggests that the Device Keying Binary size be restricted to less than 64 KB, based on the minimuminternal SRAM that is used (128 KB). Of that 128 KB of internal SRAM, the Marvell ® WTM locks 32KB, which leaves 96 KB for software usage in a minimum internal SRAM scenario.3.2 OEM Boot Module Requirements for NANDPlatformsThe OEM boot module is responsible for performing all of the relevant tasks required for booting theplatform. OEMs can choose between using their proprietary mechanism for identifying and loadingthe images from the NAND flash, or using the Marvell proposed bad block/relocation table located inBlock 0 of the NAND flash in identifying and loading images from the flash. An example of an OEMboot module that uses the Marvell proposed bad block/relocation table is provided as a template.The requirements that must be completed by the OEM boot module include the following:• Identifying the OS loader/image in the NAND flash• Loading the content of the OS loader/image from the NAND flash into either internal SRAM orthe DDR memory, as applicable• Integrity checking the OS loader/image for trusted platforms• Executing the loaded image.The OEM boot loader must first initialize the DDR memory when loading to DDR memory. The OEMboot module must also relocate the contents of a block that goes bad in the process of accessing theblock to a new block and update the bad block/relocation table of the platform.The OEM boot module in Block 0 must also have all the basic OS startup capabilities, such asidentifying reset reason and knowing when/how to identify and load the OS loader/image. Forexample, when returning from sleep resume, the OEM boot module simply performs the relevantrequirements or workarounds, and transitions to the OS image in the DDR; when returning fromhardware reset, the OEM boot module must perform a full DDR memory initialization and load theOS contents from the NAND flash to the DDR memory before transitioning to the DDR memory tocontinue execution.3.2.1 NAND OEM Boot Module Size RestrictionsIf the Marvell bad-block management table is used and the Trusted Image Module or image moduleis used, then the OEM boot module is restricted by the size of the available internal SRAM. If theMarvell bad-block management table or the image module is not present, then the OEM bootmodule is restricted to Block 0 of the NAND.3.3 NAND Bad/Relocation Block Table DefinitionThis section defines the bad-block relocation table that is used by the Boot ROM to load the OEMboot module and by the OEM boot module to identify and load the OS loader/image from the NAND12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 23
Page 1 and 2: CoverMarvell® PXA3xx Processors an
Page 3 and 4: Table of Contents1 Boot ROM Functio
Page 5 and 6: 6.3.5 USB Vendor Request Package ..
Page 7 and 8: Figure 1:PXA3xx Top Level Boot ROM
Page 9 and 10: Table 42: Host Commands ...........
Page 11 and 12: 1 Boot ROM Functional Overview1.1 G
Page 13 and 14: Figure 1:PXA3xx Top Level Boot ROM
Page 15 and 16: Boot ROM Differences2 Boot ROM Diff
Page 17 and 18: Boot ROM DifferencesTIM/NTIM/OBM Su
Page 19 and 20: Boot ROM DifferencesPXA31x and Tavo
Page 21: Boot ROM DifferencesPXA31x and Tavo
Page 25 and 26: Typedef struct S_Reloc{USHORT Heade
Page 27 and 28: 4 Methods for Platform Provisioning
Page 29 and 30: 4. If the same OEM boot module is u
Page 31 and 32: multiple versions of the Device Key
Page 34 and 35: PXA3xx Processor and Tavor Processo
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PXA3xx Processors and Tavor Process
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Marvell Semiconductor, Inc.700 Firs
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PXA3xx Boot ROM Reference Manual - Marvell

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