PXA3xx Boot ROM Reference Manual - Marvell

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PXA3xx Processors and Tavor ProcessorBoot ROM Reference Manual9.2 Preprogrammed Flash RequirementsFor large-volume manufacturing, the preprogramming of flash memory is supported. When using atrusted image module, the requirements are as follows:• Program the trusted image module to the correct offset; contact your Marvell ApplicationsEngineer for more information.• Program the OEM boot module and any other image described in the non-trusted imagemodule, to the address indicated by FlashEntryAddr of the trusted image module.• Perform device provisioning using a Device Keying Binary.Programming of the fuses is required when a trusted image module is used. The Trusted Boot ROMexamines flash memory and searches for the non-trusted image module. After it is found, the imageis loaded, the CRC verified, and control is transferred.9.3 JTAG Re-enablementTo troubleshoot failed parts returned from the field, it is necessary to gain access to the devicethrough the JTAG port. However, access to this port is disabled by non-volatile fuses in devices withthe security module enabled. This feature protects the security module and the device fromcompromise, but also prevents the primary debug interface. However, there is a challenge/responsemechanism for re-enabling the JTAG port.After the JTAG port is re-enabled, it remains accessible until the next power-on reset. After apower-on reset, the JTAG challenge/response must occur again before the JTAG port can be used.The Boot ROM enables the JTAG challenge/response mechanism during initialization of the WTM,using the OEM’s JTAG re-enabling key hash stored in the trusted image module and in the one-timeprogrammable registers (if available) during the device keying process.After the WTM is enabled for the JTAG challenge/response, one attempt per power-on reset isallowed. After a failed attempt, the WTM locks out the JTAG port until a power-on reset hasoccurred. If the validation of the trusted image module fails during the platform initialization, a newtrusted image module must first be downloaded and validated using the OEM platform bind keyburned into the WTM fuses.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 92
10 TIM/NTIM Support For Memory DevicesThis section provides details on memory device support for trusted and non-trusted boot.TIM - Trusted Image ModuleNTIM - Non-Trusted Image Module10.1 NAND FlashThe Marvell ® Trusted Boot ROM supports booting from x8 or x16 NAND devices attached to ChipSelect 0 of the processor data flash controller. Both large and small block devices are supported.Contact your Marvell FAE with questions about specific devices.The TIM/NTIM is located in Block 0 at offset 0x0 of the NAND device. The Trusted Boot ROM loadsthe first page of Block 0 and searches for the “TIMH” identifier embedded in the version informationof the Non-Trusted Image Module. If the structure is found, it is loaded into the internal SRAM of thesystem. From this point forward, the Trusted Boot ROM uses the Non-Trusted Image Module to loadthe OEM boot module.The OEM boot module is described by the image information contained in the image informationarray and is identified by the “OBMI” image identifier. This required identifier is necessary for properuse with the Trusted Boot ROM. Using the information that describes the OEM boot module, theimage is loaded from the flash offset pointed to by the FlashEntryAddr to the location pointed toby the LoadAddr. The number of bytes loaded is determined by the ImageSize entry.Once the image has been loaded to the correct address, the CRC must be verified. The image CRCis calculated based on the ImageSize, LoadAddr, and ImageSizeToCRC entries. Then, thecalculated CRC is compared to the CRC stored in the Non-Trusted Image Module in the CRC field.Upon a successful check, control is transferred to the image at the load address.10.2 XIP Flash on Chip Select 2The Trusted Boot ROM supports booting from an XIP device attached to Chip Select 2 of theprocessor static memory controller. Several XIP devices are supported so contact your Marvell FAEwith questions about specific devices.The TIM/NTIM is located at offset 0x0 of the XIP device. For Chip Select 2, the XIP device ismemory mapped to 0x1000_0000, and is the address where the Non-Trusted Image Module mustreside. The Trusted Boot ROM searches for the “TIMH” identifier embedded in the versioninformation of the TIM/NTIM. If the structure is found, it is loaded into the internal SRAM of thesystem. From this point on, the Trusted Boot ROM uses the TIM/NTIM to load the OEM bootmodule.The OEM boot module is described by the image information contained in the image informationarray. It is identified by the “OBMI” image identifier. This required identifier is necessary for properuse with the Trusted Boot ROM. Using the information that describes the OEM boot module, theimage is loaded from the flash offset pointed to by the FlashEntryAddr to the location pointed toby the LoadAddr. The number of bytes loaded is determined by the ImageSize entry.Once the image has been loaded to the correct address, the CRC ImageSizeToCRC must beverified. The image CRC is calculated based on the ImageSize and LoadAddr entries. Then, thecalculated CRC is compared to the CRC stored in the Non-Trusted Image Module in the CRC field.Upon a successful check, control is transferred to the image at the load address.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 93
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CoverMarvell® PXA3xx Processors an
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Table of Contents1 Boot ROM Functio
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6.3.5 USB Vendor Request Package ..
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Figure 1:PXA3xx Top Level Boot ROM
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Table 42: Host Commands ...........
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1 Boot ROM Functional Overview1.1 G
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Figure 1:PXA3xx Top Level Boot ROM
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Boot ROM Differences2 Boot ROM Diff
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Boot ROM DifferencesTIM/NTIM/OBM Su
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Boot ROM DifferencesPXA31x and Tavo
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Boot ROM DifferencesPXA31x and Tavo
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3 Software RequirementsThis chapter
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Typedef struct S_Reloc{USHORT Heade
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4 Methods for Platform Provisioning
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4. If the same OEM boot module is u
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multiple versions of the Device Key
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PXA3xx Processor and Tavor Processo
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PXA3xx Boot ROM Reference Manual - Marvell

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