PXA3xx Boot ROM Reference Manual - Marvell

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PXA3xx Processor and Tavor ProcessorBoot ROM Reference ManualNoteNoteVersion 3.xx Boot ROMs have the backwards compatibility mode where the header isoptional; however, if using OneNAND in the system, a header (NTIM or TIM) MUST beimplemented (applicable to all versions of Boot ROM).5.5.1 Exiting Low Power Mode and Resets with OneNANDResuming from low power modes and reset exits are different depending on whether the Boot ROMhas the integrated driver. For example, the PXA320 B2 does not have the integrated driver forOneNAND memory. The Boot ROM can access only the XIP area. The PXA310 A2 does have thedriver embedded so the Boot ROM enables direct accesses to the OneNAND memory device atboot time, reset, and low-power mode exits as described in Table 9, Trusted Image ModuleLocations for Trusted Boot, on page 36.Table 15:ProcessorStepping andBoot ROMVersionAll Devices;PXA302 &PXA312 (PoP)Tavor B0.bVersion 3.32PXA31x A2Version 3.33PXA31x A2Version 3.33OneNAND Device ID SupportSamsung OneNAND Device InformationDevice ID Generation ID Description0x30 0 1G Mux0x31 0 1G Mux0x30 1 1G Mux A-die0x31 1 1G Mux A-die0x20 0 512M Mux0x21 0 512M Mux0x20 2 512M Mux B-die0x21 2 512M Mux B-die0x38 0 1G DDP Mux0x39 0 1G DDP Mux0x48 0 2G DDP Mux0x49 0 2G DDP Mux0x10 0 256M Mux0x10 1 256M Mux0x11 0 256M Mux0x11 1 256M Mux0x00 0 128M Mux0x01 0 128M Mux0x40 0 2G Mux M-die0x41 0 2G Mux M-die0x58 0 4G Mux M-die12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 44
5.6 mDOC SupportThe Sandisk mDOC memory is interfaced to the processor using the DFI bus with nCS2 as the bootchip select, much the same as OneNAND.Table 1, Version 2.xx and Version 3.xx High Level Differences, on page 15 states which version ofBoot ROM natively supports this memory device.The mDOC device acts as a NAND disk; however, no file system is mounted during the processorboot operation. Instead, the mDOC driver code resident in the processor Boot ROM allows accessesto the mDOC device via formatted partitions and sector offsets within the partitions.The TIM/NTIM must reside in Partition 2, Sector Offset 0. Any other images (OBM) must reside inPartition 2 or greater (applicable to Boot ROM versions 3.32 and later).NoteNoteWhen connecting the mDOC memory to a processor with a Boot ROM version 3.27 orearlier, the NTIM/TIM must be loaded to the XIP area at address 0x1000_0000. TheOBM image also resides in the XIP space and must contain an mDOC driver. The BootROM cannot directly access the mDOC memory until the driver has been loaded fromthe OBM boot code.Partition 1 is an OTP partition that stores keys for trusted boot operations, but otherwise is notusable. mDOC sectors are 512 bytes.The 32-bit flash address for mDOC images are calculated as follows:28 bit sector offset 4 bit partition #Here are examples of how to calculate Flash positions within the mDOC device for use with inputfiles for the TBB tool:mDOC address-------------------NTIM (must be in Partition 2, Sector Offset 0) = 0x2OBM in Partition 5 starting at Sector Offset 32 = 0x205OBM in Partition 3 starting at Sector Offset 506 = 0x1FA3NoteNoteVersion 3.xx Boot ROMs have the backwards compatibility mode where the header isoptional; however, if using mDOC in the system, a header (NTIM or TIM) MUST beimplemented (applies to ALL versions of Boot ROM).5.6.1 Exiting Low Power Mode and Resets with mDOCResuming from low power modes and reset exits are different depending on whether the Boot ROMhas the integrated driver. For example, the PXA320 B2 does not have the integrated driver formDOC memory. The Boot ROM can access only the XIP area. The PXA310 A2 does have the driverembedded so the Boot ROM enables direct accesses to the mDOC memory device at boot time,reset and low power mode exits as described in Table 9, Trusted Image Module Locations forTrusted Boot, on page 36.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 45
Page 1 and 2: CoverMarvell® PXA3xx Processors an
Page 3 and 4: Table of Contents1 Boot ROM Functio
Page 5 and 6: 6.3.5 USB Vendor Request Package ..
Page 7 and 8: Figure 1:PXA3xx Top Level Boot ROM
Page 9 and 10: Table 42: Host Commands ...........
Page 11 and 12: 1 Boot ROM Functional Overview1.1 G
Page 13 and 14: Figure 1:PXA3xx Top Level Boot ROM
Page 15 and 16: Boot ROM Differences2 Boot ROM Diff
Page 17 and 18: Boot ROM DifferencesTIM/NTIM/OBM Su
Page 19 and 20: Boot ROM DifferencesPXA31x and Tavo
Page 21 and 22: Boot ROM DifferencesPXA31x and Tavo
Page 23 and 24: 3 Software RequirementsThis chapter
Page 25 and 26: Typedef struct S_Reloc{USHORT Heade
Page 27 and 28: 4 Methods for Platform Provisioning
Page 29 and 30: 4. If the same OEM boot module is u
Page 31 and 32: multiple versions of the Device Key
Page 34 and 35: PXA3xx Processor and Tavor Processo
Page 72 and 73: PXA3xx Processors and Tavor Process
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PXA3xx Processors and Tavor Process
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Marvell Semiconductor, Inc.700 Firs
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PXA3xx Boot ROM Reference Manual - Marvell

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