PXA3xx Boot ROM Reference Manual - Marvell

Table 28:Chip Select 2 SetupRegister Address Value FunctionSMEMC_CSADRCFG_2 0x4A00_0088 0x00320919 ––SMEMC_MSC1 0x4A00_000C Bits [15:0] = 0x7FF8All others = DefaultThese configurations are in addition to the ones described in Table 29 and are only configured if theprocessor is configured for NAND boot support.Table 29: Additional PXA30x Processor Ball Values Set for NAND Platforms OnlyBall Name Address ValueDF_nCS0 0x40E1_0248 [31:3] = Default; [2:0] = 1DF_nCS1 0x40E1_0278 [31:3] = Default; [2:0] = 1DF_nWE 0x40E1_00CC [31:3] = Default; [2:0] = 1DF_nRE 0x40E1_0200 [31:3] = Default; [2:0] = 1DF_nCS0 0x40E1_0248 [31:3] = Default; [2:0] = 1Ball_DF_INT_RnB 0x40E1_00C8 0x0000_1500Values in Table 30 are used for configuring the UART port for image download over UART.Table 30: FFUART PinsBall Name Address Value FunctionGPIO30 0x40E1_040C 0x0000_1402 FFRXDGPIO31 0x40E1_0410 0x0000_1402 FFTXDGPIO32 0x40E1_0414 0x0000_1502 FFCTSGPIO33 0x40E1_0418 0x0000_1502 FFDCDGPIO34 0x40E1_041C 0x0000_1502 FFDSRGPIO35 0x40E1_0420 0x0000_1502 FFRIGPIO36 0x40E1_0424 0x0000_1502 FFDTRGPIO37 0x40E1_0428 0x0000_1502 FFRTSValues in Table 31 are used for configuring the USB client single-ended port for image downloadover USB.Table 31: USB Single Ended PinsBall Name Address Value FunctionGPIO99 0x40E1_0600 0x0000_1402 nOE2GPIO100 0x40E1_0604 0x0000_1402 VPO2GPIO101 0x40E1_0608 0x0000_1402 RCV2GPIO102 0x40E1_060C 0x0000_1402 VMO2––12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 57