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PXA3xx Boot ROM Reference Manual - Marvell

PXA3xx Boot ROM Reference Manual - Marvell

PXA3xx Boot ROM Reference Manual - Marvell

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<strong>PXA3xx</strong> Processor and Tavor Processor<strong>Boot</strong> <strong>ROM</strong> <strong>Reference</strong> <strong>Manual</strong>Figure 7:Coprocessor Trusted Module Save State Implementation5.1.4 Specific Requirements for NAND PlatformsA NAND platform requires support for bad-block management, as well as error detection andcorrection. ECC_EN and SPARE_EN are enabled when programming NAND blocks using the NANDFlash Controller. The <strong>Boot</strong> <strong>ROM</strong> makes use of the <strong>Marvell</strong> bad-block management scheme if thebad-block table is present. If the <strong>Marvell</strong> bad-block table is not present, the OEM boot module islimited in size as defined in Table 10.Table 10: OEM <strong>Boot</strong> Module Sizes Without <strong>Marvell</strong> Bad Block ManagementPlatform Configuration Small Block NAND Large Block NANDNon-Trusted Block 0 – 1 page (15.5 KB) Block 0 -1 page (127 KB)Non-TrustedTrustedBlock 0 – image module - 1 page(approximately 15 KB)Block 0 – Trusted Image Module size– 1 page (11.5 KB)Block 0 – image module -1 page(approximately 126 KB)Block 0 – Trusted Image Module size– 1 page (123 KB)The trusted size allows for the trusted image module size to be a maximum of 4 KB. If the imagemodule is also used for a non-trusted platform, one page is reserved for the image module.If the <strong>Marvell</strong> bad-block scheme is implemented and the image module or trusted image module isimplemented, the OEM boot module size restriction does not exist and the OEM boot module can beany size. The size of the OEM boot module is determined from the image module or trusted imagemodule as well as the starting location. The OEM boot module likely consumes contiguous blocks inthe NAND device, (Blocks 1 through 3, for example). The image cannot be broken intonon-contiguous blocks unless a block is relocated through the bad-block table. Refer to Section 3"Software Requirements" for more details on NAND bad-block management.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 <strong>Marvell</strong>Page 38

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