PXA3xx Boot ROM Reference Manual - Marvell

PXA3xx Processor and Tavor ProcessorBoot ROM Reference Manual5.13 Error ConditionsThe Boot ROM reports error conditions by either writing the error code to address 0x5C00_8000 orvia messaging using the WTPTP utility. Refer to Appendix A, Return Error Code Definitions.5.14 Hints And TipsBelow is a short list of key information that must be understood and implemented in the system for asuccessful boot. Use these as a guide to start debugging a boot problem.Some of these requirements may not be apparent when using the Marvell BSP. For example, theBSP would automatically configure the system to ensure a successful boot such as pre-pending theOBM image.If using the processor without an OS BSP provided by Marvell or bringing up a proprietary OS,system developers must be aware of these high level but key points.Version 2.xx processors:• Require two words of offset to be pre-pended by the OBM image• The OBM may occupy up to 2 blocks of NAND memoryVersion 3.xx processors:• Removed requirement for first 2 wordsBoth versions; Unused pages within the first block MUST be programmed (0b0) by padding theOBM image to equal 1 block size• Required to make the ECC information consistent• If the "unused" pages in Block 0 are not padded, the Boot ROM returns a failure and the systemdoes not bootThe Boot ROM returns an error code in the event of a failed operation such as failure to boot,download an image or a memory read/write operation• These error codes are written to ISRAM location 0x5C00_8000• Error messages are also sent using the WTPTP utility• Error Codes are listed in Appendix A of this document12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 60