PXA3xx Boot ROM Reference Manual - Marvell

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PXA3xx Processors and Tavor ProcessorBoot ROM Reference Manual10.3 OneNAND FlashThe Trusted Boot ROM supports booting from a x16 OneNAND device attached to Chip Select 2 ofthe processor static memory controller. Refer to Section 5.2, “Boot ROM NAND Device Support” forsupported NAND devices.The Non-Trusted Image Module is located in Block 0 at offset 0x0 of the OneNAND device. TheOneNAND device is memory mapped to 0x1000_0000. The Trusted Boot ROM loads the first pageof Block 0 and searches for the “TIMH” identifier embedded in the version information of theNon-Trusted Image Module. If the structure is found, it is loaded into the internal SRAM of thesystem. From this point forward, the Trusted Boot ROM uses the Non-Trusted Image Module to loadthe OEM boot module.The OEM boot module is described by the image information contained in the image informationarray, and is identified by the “OBMI” image identifier. This required identifier is necessary for properuse with the Trusted Boot ROM. Using the information that describes the OEM boot module, theimage is loaded from the flash offset pointed to by the FlashEntryAddr to the location pointed toby the LoadAddr. The number of bytes loaded is determined by the ImageSize entry.Once the image has been loaded to the correct address, the CRC must be verified. The image CRCis calculated based on the ImageSize, LoadAddr, and ImageSizeToCRC entries. Then, thecalculated CRC is compared to the CRC stored in the Non-Trusted Image Module in the CRC field.Upon a successful check, control is transferred to the image at the load address.Refer to Section 5.5, “OneNAND Support” for more details.10.4 SanDisk FlashThe Trusted Boot ROM supports booting from a x16 SanDisk device attached to Chip Select 2 of theprocessor static memory controller. Large block devices are supported so contact your Marvell FAEwith questions about specific devices.The Non-Trusted Image Module is located in Block 0 at offset 0x0 of the SanDisk device, which ismemory mapped to 0x1000_0000. The Trusted Boot ROM loads the first page of Block 0 andsearches for the “TIMH” identifier embedded in the version information of the Non-Trusted ImageModule. If the structure is found, it is loaded into the internal SRAM of the system. From this pointon, the Trusted Boot ROM uses the Non-Trusted Image Module to load the OEM boot module.The OEM boot module is described by the image information contained in the image informationarray, and is identified by the “OBMI” image identifier. This required identifier is necessary for properuse with the Trusted Boot ROM. Using the information that describes the OEM boot module, theimage is loaded from the flash offset pointed to by the FlashEntryAddr to the location pointed toby the LoadAddr. The number of bytes loaded is determined by the ImageSize entry.Once the image has been loaded to the correct address, the CRC must be verified. The image CRCis calculated based on the ImageSize, LoadAddr, and ImageSizeToCRC entries. Then, thecalculated CRC is compared to the CRC stored in the Non-Trusted Image Module in the CRC fie.Refer to Section 5.6, “mDOC Support” for more details.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 94
Communication Protocol11 Communication ProtocolThe chapter describes the relevant details of the USB/UART communication protocol to allow OEMsto port their existing proprietary USB/UART applications to support communication with the BootROM.The communication protocol is used to download images during the device keying process, as wellas for the JTAG re-enabling process.Refer to Table 1, Version 2.xx and Version 3.xx High Level Differences, on page 15 for specificprocessor support of this feature.In this section, the "Host" refers to the WTPTool.exe application and "Target" refers to the BootROM.The communication protocol follows a strict handshaking methodology, which is always initiated bythe host. The host sends a command packet and the target responds with a status packet (responsepacket).12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 95
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CoverMarvell® PXA3xx Processors an
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Table of Contents1 Boot ROM Functio
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6.3.5 USB Vendor Request Package ..
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Figure 1:PXA3xx Top Level Boot ROM
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Table 42: Host Commands ...........
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1 Boot ROM Functional Overview1.1 G
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Figure 1:PXA3xx Top Level Boot ROM
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Boot ROM Differences2 Boot ROM Diff
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Boot ROM DifferencesTIM/NTIM/OBM Su
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Boot ROM DifferencesPXA31x and Tavo
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Boot ROM DifferencesPXA31x and Tavo
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3 Software RequirementsThis chapter
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Typedef struct S_Reloc{USHORT Heade
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4 Methods for Platform Provisioning
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4. If the same OEM boot module is u
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multiple versions of the Device Key
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PXA3xx Processor and Tavor Processo
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PXA3xx Boot ROM Reference Manual - Marvell

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