PXA3xx Boot ROM Reference Manual - Marvell

PXA3xx Processor and Tavor ProcessorBoot ROM Reference ManualTable 31: USB Single Ended Pins (Continued)Ball Name Address Value FunctionGPIO104 0x40E1_0614 0x0000_1402 VM2GPIO105 0x40E1_0618 0x0000_1402 VP2GPIO106 0x40E1_061C 0x0000_1402 SPEED5.12 Tavor Processor Implementation DetailsThe following tables provide implementation settings for the Tavor processor.Table 32: Tavor Processor Register SettingsBall Name Address ValueDF_nCS0 0x40E1_022C 0x0000_1001DF_nWE 0x40E1_0234 0x0000_1001DF_nRE_nOE 0x40E1_0238 0x0000_1001DF_SCLK_E 0x40E1_0238 0x0000_1001nLUA 0x40E1_0254 0x0000_1001ND_CLE 0x40E1_020C 0x0000_1001DF_nADV1_ALE 0x40E1_0218 0x0000_1001DF_IO0 0x40E1_023C 0x0000_1001DF_IO1 0x40E1_0240 0x0000_1001DF_IO2 0x40E1_0244 0x0000_1001DF_IO3 0x40E1_0248 0x0000_1001DF_IO4 0x40E1_0264 0x0000_1001DF_IO5 0x40E1_0268 0x0000_1001DF_IO6 0x40E1_026C 0x0000_1001DF_IO7 0x40E1_0270 0x0000_1001DF_IO8 0x40E1_0274 0x0000_1041DF_IO9 0x40E1_0278 0x0000_1041DF_IO10 0x40E1_027C 0x0000_1041DF_IO11 0x40E1_0280 0x0000_1041DF_IO12 0x40E1_0284 0x0000_1041DF_IO13 0x40E1_0288 0x0000_1041DF_IO14 0x40E1_028C 0x0000_1041DF_IO15 0x40E1_0290 0x0000_1041These values are in addition to those inTable 32.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Doc. No. MV-S301208-00 Rev. - PUBLIC RELEASE Copyright © 2010 MarvellPage 58