PXA3xx Boot ROM Reference Manual - Marvell

Table 23: PXA31x Processor Implementation Settings (Continued)Ball Name Address ValueDF_IO13 0x40E1_0264 0x0000_1801DF_IO14 0x40E1_026C 0x0000_1801DF_IO15 0x40E1_0274 0x0000_1801The configurations in Table 24 are in addition to those in Table 24 and are only configured if theprocessor is configured for NAND boot support.Table 24: Additional PXA31x Processor Ball Values Set for NAND Platforms OnlyBall Name Address ValueDF_nCS0 0x40E1_0248 [31:3] = Default; [2:0] = 1DF_nCS1 0x40E1_0278 [31:3] = Default; [2:0] = 1DF_nWE 0x40E1_00CC [31:3] = Default; [2:0] = 1DF_nRE 0x40E1_0200 [31:3] = Default; [2:0] = 1Ball_DF_INT_RnB 0x40E1_00C8 0x0000_1500The values in Table 25 are used for configuring the USB 2.0 Client ULPI port for image downloadover USB.Table 25: USB Port ULPI PinsBall Name Address Value FunctionGPIO30 0x40E1_0418 0x0000_55C3 ULPI Data 0GPIO31 0x40E1_041C 0x0000_55C3 ULPI Data 1GPIO32 0x40E1_0420 0x0000_55C3 ULPI Data 2GPIO33 0x40E1_0424 0x0000_55C3 ULPI Data 3GPIO34 0x40E1_0428 0x0000_55C3 ULPI Data 4GPIO35 0x40E1_042C 0x0000_55C3 ULPI Data 5GPIO36 0x40E1_0430 0x0000_55C3 ULPI Data 6GPIO37 0x40E1_0434 0x0000_55C3 ULPI Data 7GPIO38 0x40E1_0438 0x0000_55C1 ULPI ClkValues in Table 26 are used for configuring the UART port for image download over UART.Table 26: FFUART PinsBall Name Address Value FunctionGPIO99 0x40E1_0600 [31:1] = Default;[0] = 0b1GPIO100 0x40E1_0604 31:1] = Default;[0] = 0b1GPIO101 0x40E1_0608 31:1] = Default;[0] = 0b1GPIO106 0x40E1_061C 31:1] = Default;[0] = 0b1FFRXDFFTXDFFCTSFFRTS12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 2010 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 55