PXA3xx Boot ROM Reference Manual - Marvell

1 Boot ROM Functional Overview1.1 General DescriptionThe Boot ROM software is preloaded into the processors’ internal ROM. The Boot ROM is anenabling component of the Marvell Trusted Boot solution. The Boot ROM provides support for theimplementation of processors with Intel XScale ® technology for the usage cases described in thefollowing sections. When operating in a non-trusted mode, the Boot ROM supports loading softwarefrom various devices as part of the boot process. When operating in a trusted mode, the Boot ROMis considered the root of trust for the platform and it handles the initialization of the Marvell ® WirelessTrusted Module (Marvell ® WTM) subsystem.Because the Boot ROM is configured at manufacture, no changes can be made to the bootconfiguration of the Boot ROM. The correct boot configuration must be ordered from Marvell for agiven platform architecture however some processors support an “auto-boot feature and are notconfigured to one boot memory for the first boot. Refer to 2 "Boot ROM Differences" for details onauto-boot support.The list of supported boot configurations and how to configure the PXA31x auto-boot feature arediscussed in this document.The Boot ROM implements a common set of functionality across allimplementations of the PXA3xx processor family and Tavor processor. Refer to the specificprocessor developers manual for details of the processor features.1.2 Purpose Of This DocumentThis document covers the operational details of the Boot ROM for the PXA3xx processor family andTavor processors. System- level dependencies are also covered such as:• Booting the platform• Choice of NAND memory and how the Boot ROM supports NAND• Managed NAND support - This is NAND memory with a NOR-like bus interface such asSamsung OneNAND and Sandisk mDOC.• Software requirements for both trusted and non-trusted platforms• Boot ROM versions and feature sets• Exiting low power modes• Host Tools• JTAG Re-enablement1.3 ROM Location, Size, and MappingThe processor family has 48 KB of internal ROM, which is used for the Boot ROM. Anytime theprocessor goes through a power transition that causes a jump to the reset vector, the Boot ROM ismapped to two different address spaces, via hardware mechanisms:• 0x0000_0000 - 0x0000_BFFF• 0x5E00_0000 - 0x5E01_FFFFThe physical ROM is mapped to the 0x5E00_0000 - 0x5E01_FFFF address space in theprocessor memory map. The 0x0000_0000 - 0x0000_BFFF address space is a virtual memorymapping implemented by the hardware to locate the vector table at the correct address for theprocessor core. After any power transition which causes the processor core to jump to the resetvector, the Boot ROM is the first code to execute on the processor.12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758Copyright © 1/29/08 Marvell PUBLIC RELEASE Doc. No. MV-S301208-00 Rev. -Page 11