Data Acquisition

Contents vii4.2.1 Hardware interrupts 734.2.2 Non-maskable interrupts 734.2.3 Maskable interrupts 734.2.4 Programmable interrupt controller(s) 734.2.5 Initialization required for interrupts 754.2.6 I/O devices requesting interrupt service 754.2.7 Interrupt service routines 764.2.8 Sharing interrupts 774.3 Operation of direct memory access (DMA) 774.3.1 DMA controllers 784.3.2 Initialization required for DMA control 794.3.3 I/O devices requesting DMA 794.3.4 Terminal count signal 804.3.5 DMA modes 814.4 Repeat string instructions (REP INSW) 834.5 Polled data transfer 844.6 Data transfer speed (polled I/O, interrupt I/O, DMA) 964.7 Memory 974.7.1 Base memory 974.7.2 Expanded memory system (EMS) 984.7.3 Extended memory (XMS) 994.7.4 Expansion memory hardware 994 8 Expansion bus standards (ISA, EISA, PCI, and PXI bus) 994.8.1 ISA bus 994.8.2 Microchannel bus 1084.8.3 EISA bus 1084.8.4 The PCI, compactPCI and PXI bus 1094.9 Serial communications 1124.9.1 Standard settings 1124.9.2 Intelligent serial ports 1124.10 Interfacing techniques to the IBM PC 1134.10.1 Hardware considerations 1144.10.2 Address decoding 1154.10.3 Timing requirements 1165 Plug-in data acquisition boards 1195.1 Introduction 1195.2 A/D Boards 1205.2.1 Multiplexers 1205.2.2 Input signal amplifier 1215.2.3 Channel-gain arrays 1235.2.4 Sample and hold circuits 1235.2.5 A/D converters 1245.2.6 Memory (FIFO) buffer 136