Data Acquisition

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espect to the measurement system ground. Applying common mode voltages to eitherinput beyond this input range will result in measurement errors, or, in the worst case,possible damage to the measurement circuitry.3.4.6 Measuring grounded signal sourcesDifferential measurement of grounded signal sourceA grounded signal source is best measured with a differential or pseudo-differentialmeasurement system as shown in Figure 3.23. In this configuration, any potential difference(∆V g ) between the ground references of the source and the measurement systemappears as a common-mode voltage to the measurement system. The measureddifferential voltage is defined as:V m = (V s .+∆V g ) – ∆V g = V sFigure 3.23Differential measurement of a grounded signal sourceSingle-ended measurement of a grounded signal sourceWhen a single-ended measurement system is used to measure a grounded signal source,as shown in Figure 3.24, measurement problems may occur. In this configuration, any potentialdifference (∆V g ) between the signal source ground and the measuring systemground is added to the signal source voltage as part of the measurement. The measuredvoltage is defined as:V m = V s .+∆V gFigure 3.24Single-ended measurement of a grounded signal source
If the signal voltage levels are quite high compared to the reference ground potentialdifference, and the wiring between the source and the measurement system has lowimpedance, then the inaccuracies in the signal voltage measurement may be acceptable.3.4.7 Ground loopsThe classic ground-loop problem arises because true earth ground is not necessarily thesame potential at different locations. Where the ends of a wire are earth grounded atdifferent locations, the potential difference between them (which may vary from microvoltsto many volts) can cause significant currents, referred to as ground-loop currents, toflow through the wire. In addition, this potential difference is not necessarily a DC level.As well as introducing DC offset errors, ground-loop currents contain AC components,such as AC mains hum (50–60 Hz), and are a continual source of noise. This is especiallytrue when multiple ground points in a system separated by large distances are connectedto AC power ground, or when the magnitude of signal levels in analog circuits is lowcompared to the noise voltage levels.Where signal lines are used to connect grounds then ground currents will flow withunpredictable results. A possibly more serious result of ground loops is the undefinedcurrent loop area, which may couple magnetic fields and induce other unwanted noisevoltages in the signal conductors.3.4.8 Signal circuit isolationWhere a signal conductor is required to be earthed at both ends and additional noiseimmunity is required, the ground loop should be broken by isolating the signal sourcefrom the measuring equipment. Isolation by the use of transformers, opto-couplers andcommon mode chokes, is shown in Figures 3.25, 3.26 and 3.27 respectively.Figure 3.25Transformer isolation of ground loopWhen a transformer is used to isolate the signal source from the measurement systemthe common mode voltage appears between the windings of the transformer and not at theinput to the measurement circuit. Noise coupling between the circuits is very small anddependent on any stray capacitance between the transformer windings. Disadvantageswith using transformers are that they are quite large and costly, especially where severalsignal circuits have to be isolated. In addition, transformers have limited frequency responseand provide no DC continuity from the signal source to the measurement system.The opto-isolated circuit, shown in Figure 3.26, is more typically used for digitalsignals because of the non-linearity of the opto-coupler to analog signals.
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Practical Data Acquisition forInstr
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Practical Data Acquisition forInstr
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In less than a decade, the PC has b
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PrefaceContentsxvii1 Introduction 1
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Contents vii4.2.1 Hardware interrup
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Contents ix6.2.3 Functional descrip
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Contents xi9.1 Ethernet and fieldbu
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Contents xiii12.5.2 Pin assignments
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Contents xvType R thermocouple 384T
Page 20 and 21: A data acquisition and control syst
Page 22 and 23: FilteringIn noisy environments, it
Page 24 and 25: are capable of programmed I/O and i
Page 26 and 27: Plug-in expansion boards are common
Page 28 and 29: 50 mRS-232 Communication InterfaceS
Page 30 and 31: speeds are of the order of 1 Mbyte/
Page 32 and 33: 14 Practical Data Acquisition for I
Page 54 and 55: 3PC based data acquisition (DAQ) sy
Page 56 and 57: 3.2.3 FilteringIsolation performs s
Page 58 and 59: The transfer characteristics of a p
Page 60 and 61: Figure 3.7Ideal band pass filter tr
Page 62 and 63: Figure 3.11Two-stage Butterworth fi
Page 64 and 65: As individual signal conditioning m
Page 66 and 67: ThermocouplesDigitalTransmitterDigi
Page 68 and 69: Examples of floating signal sources
Page 72 and 73: Figure 3.26Opto-coupler isolation o
Page 74 and 75: • Using isolation amplifiers to i
Page 76 and 77: Figure 3.31Physical representation
Page 78 and 79: field or if the field is caused by
Page 80 and 81: Where the shield is grounded (i.e.
Page 82 and 83: mines the amount of noise in the ci
Page 84 and 85: For full-duplex systems using balan
Page 86 and 87: 4.1.1 DOSusually consist of a small
Page 88 and 89: With the advent of Windows as a gra
Page 90 and 91: UNIX shellSimilar to the DOS comman
Page 92 and 93: available to the expansion bus. A l
Page 94 and 95: 4.2.7 Interrupt service routinesIt
Page 96 and 97: Whichever CPU is being used, it mus
Page 98 and 99: • An I/O device requests a DMA tr
Page 100 and 101: Normal DMA using on-board FIFOThe D
Page 102 and 103: ferring samples until the counter r
Page 104 and 105: The read or write command signals (
Page 106 and 107: Shortened 3-BCLK 8-bit memory acces
Page 108 and 109: Extended 6-BCLK 16-bit memory acces
Page 110 and 111: • A cycle which the expansion boa
Page 112 and 113: Figure 4.13Timing chart of a shorte
Page 114 and 115: Figure 4.15Timing chart of an exten
Page 116 and 117: 4.7.2 Expanded memory system (EMS)E
Page 118 and 119: The IBM PC and early versions of th
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Figure 4.17ISA signal mnemonics, si
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data bus. An example of this happen
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NOWSThe /NOWS (NO wait state) signa
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interrupt lines (1RQ13, 8, 2, 1 and
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one application at a time, it is ne
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The need for PCs to exchange data w
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Figure 4.198-bit 21-line I/O board4
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Address decoding on the 24-line pro
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The write cycle is considered in th
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data acquisition and control system
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Adjustable on-board fixed gain ampl
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level applied at the input. When a
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Each step effectively divides the r
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The operation of a dual slope integ
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Code widthThis is the fundamental q
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(a) Unipolar offset error(b) Bipola
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Changes in temperature result in a
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1 LSB. Therefore, an ideal A/D conv
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• The source and level of interru
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5.3.3 Differential inputsTrue diffe
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A/D board can divide the input rang
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a) DC alias caused by sampling at h
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Figure 5.15Frequency spectrum of or
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ate be a minimum of about five time
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Figure 5.20Many aliases combined wi
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initiated. The data is subsequently
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Figure 5.22Time skew between channe
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For each burst trigger, the A/D boa
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Analog output D/A boardsUnlike high
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Like the weighted-current source ne
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The generation of high frequency si
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• The plug-in connector, which pr
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Latched digital I/OFor applications
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y increasing the resistance of R x
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One advantage of this type of relay
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Figure 5.36Waveforms showing genera
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When a counter is configured to ena
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6The standardization of the RS-232
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A duplex system is designed for sen
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Some examples of the HEX and BIN va
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In summary, the optional settings f
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At the RS-232 receiver the followin
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110 850300 800600 7001200 5002400 2
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• Pin 7: Signal ground (common)Th
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6.2.5 Examples of RS-232 interfaces
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terminating resistors, approximatel
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Another commonly used technique, ba
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• Line controlThis applies to hal
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The calculation of the block checks
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The mechanism of operation of the C
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Figure 6.18, has appropriate intern
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77.1 IntroductionAs with other form
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inserted in the device. This is its
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How frequently logged data is uploa
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The following hardware components d
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In a typical stand-alone data acqui
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The maximum battery life that can b
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Input termination resistors, typica
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Figure 7.13 shows the standard conn
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interface, even at high speed, the
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• Use different data formats so t
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Command errors are reported immedia
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• Channel scalingThis automatical
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The channel scan for this type of s
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Data is logged in a fixed non-ASCII
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7.9 Stand-alone logger/controllers
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88.1 IntroductionThe communications
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Figure 8.2GPIB connector (IEEE 488)
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• TalkersA talker is a one-way co
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controller in charge (CIC). The IFC
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Each device connected to the GPIB h
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One of the additional features that
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• The controller temporarily conf
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Table 8.4IEEE 488.2 commandsThe SCP
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Figure 8.9SCPI instrument modelThe
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99.1 Ethernet and fieldbuses for da
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cabling tray etc and the transceive
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transceiver in the MAU and this is
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Advantages of the system include:
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of a cell as well, but these are ig
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Figure 9.8CSMA/CD collisionsAssume
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• PreambleThis field consists of
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of this figure. Some manufacturers
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Grounding has safety and noise conn
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Just as with any technology, each o
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information. The packet is then pla
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There are two types of connectors,
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HOSTClient SoftwareManages Interfac
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Figure 10.6USB connector pinsThere
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The idle states for low- and high-s
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The interrupt transfer type is used
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than in spending a lot of time and
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• The sensitivity of the output/i
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term error (m) in the system and ad
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11.2 Capturing high speed transient
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12IntroductionThe PCMCIA (PCMCIA st
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adapter on a full size computer has
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Pager cards are used in offices and
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Size 85.6 mm × 54.0 mmType I 3.3 m
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The memory only interface is conver
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The AIMS interface supports large d
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12.8 FutureThe card information str
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A/D conversion timeAddressAddress r
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Back-planeBand pass filterBandwidth
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BufferBusBWCache memoryCCDCCIRCCITT
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pixel is subjected to a mathematica
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data between the computer memory an
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FrameFrame grabberFringingFull dupl
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so that they interlock. The PAL sta
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Lux-secondSI unit of light exposure
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NTSCNull modemNumber of channelsNyq
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PortPPIPre-triggerProgram I/OProgra
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whereby the first gray level of eac
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allowing the user to control basic
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input.TrunkUARTUnipolar inputsUnloa
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Appendix BThe information in this s
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Table B.4Controller 2: 16-bit (AT o
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B.5 8253/8254 Counter/timer
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Table B.8Memory map for PC/XT/AT
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Table B.10BIOS data area
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Table B.15ROMTable B.16AT extended
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← ↔ ← ← ← ↔
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Figure B.1Card dimensions for PC/XT
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Appendix CThis section contains bri
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the control register of the 8255. T
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The bits A7 (MSB) down to A0 (LSB)
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Table C.6Instructions for reading o
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The program could also enable the I
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Group AConfiguration Informationto
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C.11 Single-bit set/resetAny of the
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Figure C.15Bi-directional bus (mode
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Figure D.18254 Block diagramFigure
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Figure D.3TCCTRL registerThe functi
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This is the data register of the fi
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• A simple read operation• A co
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The null count bit indicates if the
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For even counts: the output is init
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Appendix EThe IPTS-68 standard defi
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Number of ranges = 2Range #1 -270 t
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Range #2 0 to 1372°COrder of polyn
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Number of Ranges = 4Range #1 -50 to
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Appendix FF.1 IntroductionAll activ
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Table F.3 gives the conversion betw
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The conversion between binary and h
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F.8 Internal representation of info
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12 which is equivalent to: 1100-4 S
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DCDCASDCISDCLDDDIODTDTASDTISENDEOIE
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STBSTRSSWNST(T)TETACSTADSTAGTCATCST
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404 IndexDuplex:full duplex 178half
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406 IndexOpen loop control 285see a
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THIS BOOK WAS DEVELOPED BY IDC TECH
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