Data Acquisition

Figure 4.13Timing chart of a shortened 3-BCLK 8-bit I/O access cycleThe following two timing charts show instances of 16-bit I/O access:• A standard 3-BCLK cycle (Figure 4.14)• A cycle that the expansion board extends (to six BCLKs) with CHRDY (Figure4.15)Note that it is not possible for I/O devices to shorten cycles to run with no wait states (thatis, to two BCLKs) because, for I/O cycles, the command signal goes active only after thetrailing edge of BCLK in T 2 (when /NOWS is sampled). Also /IO16 is sampled halfwaythrough T 3 and not at the end of T 1 as in memory cycles.Standard 3-BCLK 16-bit I/O accessIf an I/O device indicates that it is a 16-bit device with the /IO16 signal, the system boardruns a 3-BCLK I/O cycle. This cycle is almost exactly the same as the shortened 3-BCLK 8-bit I/O cycle, except that the expansion board does not have to drive /NOWS and /SBHE is ofinterest in this cycle.