Data Acquisition

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12IntroductionThe PCMCIA (PCMCIA stands for Personal Computer Memory Card InternationalAssociation) standard was developed to standardize the many different types of memorycards so that they could interface to a wide variety of personal computers. In 1995 thename was changed to simply the PC Card. The PC Card can be considered the same as astandard plug-in card and is used for many different types of devices including flashmemory, analog to digital conversion, GPIB, digital I/O, networks, and modems. Specialdrivers for these cards are supplied by the PC Card manufacturers. All settings, includingbase address, IRQ and DMA, if available, are set up by the user through the installationsoftware. Temporary stay resident programs (or TSRs) are used to allow constant accessto the card by the user. The PC Card consists of miniaturized electronics inside a smallmetal box with a connector at one end. The connector is an industry standard 68 dual inlinesocket that fits into the host computer’s PC Card adapter. The other end of the PCCard may or may not have a connector, depending on the type of device.Figure 12.1PCMCIA Card
12.1 History In 1988, the Personal Computer Memory Card International Association was formed inAmerica, by representatives from memory card and chip manufacturers. In Japan, theJapan Electronics Industry Development Association (JEIDA) had been working on amemory card standard since 1985. In 1989 the PCMCIA adopted the 68-pin socket fromJEIDA. Since then JEIDA and PCMCIA have been working very closely to keep theirstandards compatible. By 1990, version 1.0 of the PC Card standard was released. Thisstandard specified memory cards and a socket for virtual drives. The idea was that thememory card would replace the floppy disk. Initially the specifications were developedfor the IBM PC, but soon other types of computers, such as the Apple Macs, wereincorporated into the standard.With the release of version 2.0 in November 1992, the PCMCIA standard now includesprovisions for input and output devices such as modems, hard disk, and data acquisitioncards. It was about this time that the association realized that for full compatibility theyneeded to include software in the standard. This software included card services andsocket services to interface the PC Card to the computer. In 1995 the Personal ComputerMemory Card Association decided that the acronym PCMCIA was too confusing so theyput out a notice that the PCMCIA card would now be known as the PC Card. Inconjunction with this, they released a new standard with no version number. This newstandard is called the PC Card Standard. Below is a list of release dates for the hardwareand software standards.Nov 1990 V 1.0 type 1 memory cardAug 1991 V 1.0 socket servicesSept 1991 V 1.01 type I, II and III addedDec 1991 V 1.0 (draft) card servicesNov 1992 V 2.0 I/O devicesJuly 1993 V 2.1 plug and play1995 PCMCIA changed to the PC Card (DMA)1996 CARDBUS (32-bit)As with most industry driven standards it is often hard to say who started the PC Card.The list of manufacturers is long, but it can be said that Intel had no small part, in somuch as they were one of the first to push their memory chip sets, to encourage themanufacture of PC Cards. Soon afterwards, companies such as Cirrus and Vadem pickedup the ball as it were, and ran with it. Also, it must be mentioned that the United Statesgovernment supply office’s decision to require all their computers be supplied with PCCard interfaces, has helped ensure the future of the PC Card.12.2 FeaturesThe PC Card’s main feature from the start was that it was small and portable. The PCCards are small enough to fit in a shirt pocket. It is no surprise then that the portablecomputer market was the first to include PCMCIA host bus adapters as a standard item.The PC Card can be used on virtually any PC or Macintosh computer. It is a 16-bit busdevice that plugs into one of two slots in a LAPTOP or a full size computer. The hostcard adapter can either be supplied with the computer or added latter. The host card
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Practical Data Acquisition forInstr
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Practical Data Acquisition forInstr
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In less than a decade, the PC has b
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PrefaceContentsxvii1 Introduction 1
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Contents vii4.2.1 Hardware interrup
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Contents ix6.2.3 Functional descrip
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Contents xi9.1 Ethernet and fieldbu
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Contents xiii12.5.2 Pin assignments
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Contents xvType R thermocouple 384T
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A data acquisition and control syst
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FilteringIn noisy environments, it
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are capable of programmed I/O and i
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Plug-in expansion boards are common
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50 mRS-232 Communication InterfaceS
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speeds are of the order of 1 Mbyte/
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14 Practical Data Acquisition for I
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3PC based data acquisition (DAQ) sy
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3.2.3 FilteringIsolation performs s
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The transfer characteristics of a p
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Figure 3.7Ideal band pass filter tr
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Figure 3.11Two-stage Butterworth fi
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As individual signal conditioning m
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ThermocouplesDigitalTransmitterDigi
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Examples of floating signal sources
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espect to the measurement system gr
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Figure 3.26Opto-coupler isolation o
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• Using isolation amplifiers to i
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Figure 3.31Physical representation
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field or if the field is caused by
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Where the shield is grounded (i.e.
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mines the amount of noise in the ci
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For full-duplex systems using balan
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4.1.1 DOSusually consist of a small
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With the advent of Windows as a gra
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UNIX shellSimilar to the DOS comman
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available to the expansion bus. A l
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4.2.7 Interrupt service routinesIt
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Whichever CPU is being used, it mus
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• An I/O device requests a DMA tr
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Normal DMA using on-board FIFOThe D
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ferring samples until the counter r
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The read or write command signals (
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Shortened 3-BCLK 8-bit memory acces
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Extended 6-BCLK 16-bit memory acces
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• A cycle which the expansion boa
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Figure 4.13Timing chart of a shorte
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Figure 4.15Timing chart of an exten
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4.7.2 Expanded memory system (EMS)E
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The IBM PC and early versions of th
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Figure 4.17ISA signal mnemonics, si
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data bus. An example of this happen
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NOWSThe /NOWS (NO wait state) signa
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interrupt lines (1RQ13, 8, 2, 1 and
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one application at a time, it is ne
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The need for PCs to exchange data w
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Figure 4.198-bit 21-line I/O board4
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Address decoding on the 24-line pro
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The write cycle is considered in th
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data acquisition and control system
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Adjustable on-board fixed gain ampl
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level applied at the input. When a
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Each step effectively divides the r
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The operation of a dual slope integ
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Code widthThis is the fundamental q
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(a) Unipolar offset error(b) Bipola
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Changes in temperature result in a
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1 LSB. Therefore, an ideal A/D conv
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• The source and level of interru
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5.3.3 Differential inputsTrue diffe
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A/D board can divide the input rang
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a) DC alias caused by sampling at h
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Figure 5.15Frequency spectrum of or
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ate be a minimum of about five time
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Figure 5.20Many aliases combined wi
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initiated. The data is subsequently
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Figure 5.22Time skew between channe
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For each burst trigger, the A/D boa
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Analog output D/A boardsUnlike high
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Like the weighted-current source ne
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The generation of high frequency si
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• The plug-in connector, which pr
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Latched digital I/OFor applications
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y increasing the resistance of R x
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One advantage of this type of relay
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Figure 5.36Waveforms showing genera
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When a counter is configured to ena
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6The standardization of the RS-232
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A duplex system is designed for sen
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Some examples of the HEX and BIN va
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In summary, the optional settings f
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At the RS-232 receiver the followin
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110 850300 800600 7001200 5002400 2
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• Pin 7: Signal ground (common)Th
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6.2.5 Examples of RS-232 interfaces
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terminating resistors, approximatel
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Another commonly used technique, ba
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• Line controlThis applies to hal
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The calculation of the block checks
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The mechanism of operation of the C
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Figure 6.18, has appropriate intern
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77.1 IntroductionAs with other form
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inserted in the device. This is its
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How frequently logged data is uploa
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The following hardware components d
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In a typical stand-alone data acqui
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The maximum battery life that can b
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Input termination resistors, typica
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Figure 7.13 shows the standard conn
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interface, even at high speed, the
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• Use different data formats so t
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Command errors are reported immedia
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• Channel scalingThis automatical
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The channel scan for this type of s
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Data is logged in a fixed non-ASCII
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7.9 Stand-alone logger/controllers
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88.1 IntroductionThe communications
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Figure 8.2GPIB connector (IEEE 488)
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• TalkersA talker is a one-way co
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controller in charge (CIC). The IFC
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Page 266 and 267: Table 8.4IEEE 488.2 commandsThe SCP
Page 268 and 269: Figure 8.9SCPI instrument modelThe
Page 270 and 271: 99.1 Ethernet and fieldbuses for da
Page 272 and 273: cabling tray etc and the transceive
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Page 280 and 281: Figure 9.8CSMA/CD collisionsAssume
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Page 288 and 289: Just as with any technology, each o
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Page 292 and 293: There are two types of connectors,
Page 294 and 295: HOSTClient SoftwareManages Interfac
Page 296 and 297: Figure 10.6USB connector pinsThere
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Page 316 and 317: Size 85.6 mm × 54.0 mmType I 3.3 m
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Page 324 and 325: A/D conversion timeAddressAddress r
Page 326 and 327: Back-planeBand pass filterBandwidth
Page 328 and 329: BufferBusBWCache memoryCCDCCIRCCITT
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Page 334 and 335: FrameFrame grabberFringingFull dupl
Page 336 and 337: so that they interlock. The PAL sta
Page 338 and 339: Lux-secondSI unit of light exposure
Page 340 and 341: NTSCNull modemNumber of channelsNyq
Page 342 and 343: PortPPIPre-triggerProgram I/OProgra
Page 344 and 345: whereby the first gray level of eac
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Page 348 and 349: input.TrunkUARTUnipolar inputsUnloa
Page 350 and 351: Appendix BThe information in this s
Page 352 and 353: Table B.4Controller 2: 16-bit (AT o
Page 354 and 355: B.5 8253/8254 Counter/timer
Page 356: Table B.8Memory map for PC/XT/AT
Page 359 and 360: Table B.10BIOS data area
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Table B.15ROMTable B.16AT extended
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← ↔ ← ← ← ↔
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Figure B.1Card dimensions for PC/XT
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Appendix CThis section contains bri
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the control register of the 8255. T
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The bits A7 (MSB) down to A0 (LSB)
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Table C.6Instructions for reading o
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The program could also enable the I
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Group AConfiguration Informationto
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C.11 Single-bit set/resetAny of the
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Figure C.15Bi-directional bus (mode
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Figure D.18254 Block diagramFigure
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Figure D.3TCCTRL registerThe functi
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This is the data register of the fi
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• A simple read operation• A co
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The null count bit indicates if the
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For even counts: the output is init
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Appendix EThe IPTS-68 standard defi
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Number of ranges = 2Range #1 -270 t
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Range #2 0 to 1372°COrder of polyn
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Number of Ranges = 4Range #1 -50 to
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Appendix FF.1 IntroductionAll activ
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Table F.3 gives the conversion betw
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The conversion between binary and h
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F.8 Internal representation of info
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12 which is equivalent to: 1100-4 S
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DCDCASDCISDCLDDDIODTDTASDTISENDEOIE
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STBSTRSSWNST(T)TETACSTADSTAGTCATCST
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404 IndexDuplex:full duplex 178half
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406 IndexOpen loop control 285see a
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THIS BOOK WAS DEVELOPED BY IDC TECH
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