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Data Acquisition

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The IBM PC and early versions of the IBM XT model of personal computer were based onthe 8-bit, 20 address-line 8088 CPU running at 4.77 MHz. In later versions of the XT, somemanufacturers also changed the microprocessor to the 16-bit 8086. In all these machines, theexpansion bus remained the same, operating at the CPU clock frequency of 4.77 MHz.With the introduction of the Intel 80286 (‘286’) 16-bit microprocessor, IBM released thePC AT. To accommodate this 16-bit bus architecture, the 8-bit ISA slot was extended to the16-bit ISA slot with the addition of eight extra data lines, four additional address lines, extrainterrupt and DMA channels and various other control signals.To allow backward compatibility with existing expansion cards, IBM kept the original 62-pin connector intact (the one closest to the rear of the expansion card), and added an extra 36-pin connector to accommodate the new signal, data and address lines. (For connector pin-outsetc, refer to the reference text ‘PC Instrumentation for the 90s.’)With the release of the PC AT also came an increase in CPU speed and subsequentincreases in ISA bus speed, originally to 6 MHz and finally to 8 MHz.When IBM decided to define the maximum ISA bus speed at 8 MHz, leading manufacturersof expansion boards began utilizing only the ICs with access times required to meetthe timing specifications of an 8 MHz ISA bus. Before long, however, AT clone manufacturerswere soon producing 286 systems with CPU clock speeds of 10, 12, 16, 20, and25 MHz. This led to backward compatibility problems between the faster CPUs and the manyslower expansion boards already in existence.At this time the ISA expansion bus changed from a local bus to a translated (or split bus)bus slot, whereby the CPU or local bus signals were buffered and the memory, I/O and DMAbus cycles slowed down to meet the 8 MHz ISA bus limit. This ‘slowing down’ was achievedby adding ‘wait states’ to the normal bus cycles, a ‘wait state’ being the condition where allbus lines remain in their current state for another full bus clock cycle.The 16-bit ISA bus is an extension of the 8-bit I/O bus of the original PC and PC XT. Theyhad between five and eight slots each, with a 62-way connector for plug-in cards. ISAextended the slots with a second connector, adding 32 more signal lines. (While XT cards aregenerally compatible with ISA computers, XT systems have become less common nowadaysand will not be discussed.)The descriptions of the ISA signals are based on the EISA specification, revision 3.12,which includes the ISA specification. Unless specifically noted, the acronym ISA refers to thepart of the EISA specification that deals with the ISA bus. Not all PC systems comply totallywith the specification but they all comply, to some degree. Any adapter board that complieswith the specification has a very good chance of working correctly even in systems that donot comply exhaustively with the specification.A common misunderstanding regarding PC specifications concerns the term clock speed.In modern PCs the CPU (or system) clock speed, or to use the more correct term clockfrequency, differs from that of the I/O bus clock. The CPU clock speed is generally 30 to50 MHz while the bus clock speed is 8 to 12 MHz. The compatibility of expansion cards isnot dependent on the CPU clock but on the I/O clock (together with DMA clock and I/Ocycle timing). ISA specifies the bus clock (BCLK) to have a frequency between 8.333 MHzand 4 MHz with a duty cycle of 50%, but many PCs have bus clocks with a higher frequency.10 MHz and 12 MHz are common while I/O clocks can be as high as 13.7 MHz.A problem that sometimes occurs when connecting an interface to the PC bus concerns thematching of the PC bus cycle with that of the interface design. For example, the interfaceboard may operate at a lower speed than that provided for by the PC bus cycle. Lowering thePC bus cycle to that of the hardware interface can solve the problem. If the bus cycle is fourclock cycles in length, a READY bus signal (derived from the interface card) tells the CPU to

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