The Impact of Dennard's Scaling Theory - IEEE
The Impact of Dennard's Scaling Theory - IEEE
The Impact of Dennard's Scaling Theory - IEEE
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PEOPLE<br />
image sensing, which resulted in<br />
the project leadership <strong>of</strong> respectively<br />
SDTV- and HDTV-imagers.<br />
In 1991 he became Department<br />
Head <strong>of</strong> the division Imaging<br />
Devices, including CCD as well<br />
as CMOS solid-state imaging<br />
activities.<br />
He is author or coauthor <strong>of</strong><br />
many technical papers in the solidstate<br />
imaging field and issued several<br />
patents. In 1988, 1989, 1995<br />
and 1996 he was a member <strong>of</strong> the<br />
International Electron Devices<br />
Meeting paper selection committee.<br />
He was co-editor <strong>of</strong> the <strong>IEEE</strong><br />
Transactions on Electron Devices<br />
special issues on Solid-State Image<br />
Sensors, May 1991, October 1997<br />
and January 2003, and <strong>of</strong> <strong>IEEE</strong><br />
Micro special issue on Digital<br />
Imaging, Nov./Dec. 1998.<br />
He acted as general chairman <strong>of</strong><br />
the <strong>IEEE</strong> International Workshop on<br />
Charge-Coupled Devices and<br />
Advanced Image Sensors in 1997<br />
and in 2003. He is member <strong>of</strong> the<br />
Steering Committee <strong>of</strong> the aforementioned<br />
workshop and founder<br />
<strong>of</strong> the Walter Kosonocky Award,<br />
which highlights the best paper in<br />
the field <strong>of</strong> solid-state image sensors.<br />
During several years he was a<br />
member <strong>of</strong> the technical committee<br />
<strong>of</strong> the European Solid-State<br />
Device Research Conference and<br />
<strong>of</strong> the European Solid-State Circuits<br />
Conference.<br />
Since 1999 he is a member <strong>of</strong><br />
the technical committee <strong>of</strong> the<br />
International Solid-State Circuits<br />
Conference. For the same conference<br />
he acted as secretary, vicechair<br />
and chair in the European<br />
ISSCC Committee and he is a member<br />
<strong>of</strong> the overall ISSCC Executive<br />
Committee.<br />
In 1995, he authored a textbook<br />
“Solid-State Imaging with Charge-Coupled<br />
Devices”. In 1998 he became an<br />
<strong>IEEE</strong> Distinguished Lecturer.<br />
In March 2001, he became parttime<br />
pr<strong>of</strong>essor at the Delft University<br />
<strong>of</strong> Technology, the Netherlands.<br />
At this University he teaches<br />
courses in solid-state imaging<br />
and coaches PhD students in their<br />
research on CMOS image sensors.<br />
In April 2002, he joined DALSA<br />
Corp. to act as the company’s<br />
Chief Technology Officer. In September<br />
2004 he retired as CTO and<br />
became Chief Scientist <strong>of</strong> DALSA<br />
Semiconductors. This shift allows<br />
him to focus more on the field <strong>of</strong><br />
training and teaching solid-state<br />
image sensor technology.<br />
In 2005 he founded ETETIS<br />
(European Technical Expert Team<br />
on Image Sensors), a non-pr<strong>of</strong>it<br />
organization to promote European<br />
R&D activities in the field <strong>of</strong> solidstate<br />
image sensors.<br />
He is member <strong>of</strong> editorial board<br />
<strong>of</strong> the magazine “Photonics Spectra”,<br />
an <strong>IEEE</strong> Fellow and member<br />
<strong>of</strong> SPIE.<br />
Roland <strong>The</strong>wes was<br />
born in Marl, Germany,<br />
in 1962. He<br />
received the Dipl.-<br />
Ing. degree and the<br />
Dr.-Ing. degree in<br />
Electrical Engineering<br />
from the University <strong>of</strong> Dortmund,<br />
Dortmund, Germany, in<br />
1990 and 1995, respectively. From<br />
1990-1995, he worked in a cooperative<br />
program between the Siemens<br />
Research Laboratories in Munich<br />
and the University <strong>of</strong> Dortmund in<br />
the field <strong>of</strong> hot-carrier degradation<br />
in analog CMOS circuits.<br />
Since 1994 he was with the<br />
Research Laboratories <strong>of</strong> Siemens<br />
AG and Infineon Technologies,<br />
where he was active in the design<br />
<strong>of</strong> non-volatile memories and in<br />
the field <strong>of</strong> reliability and yield <strong>of</strong><br />
analog CMOS circuits. From 1997-<br />
1999, he managed projects in the<br />
fields <strong>of</strong> design for manufacturability,<br />
reliability, analog device performance,<br />
and analog circuit<br />
design. From 2000-2005, he was<br />
responsible for the Lab on Mixed-<br />
Signal Circuits <strong>of</strong> Corporate<br />
Research <strong>of</strong> Infineon Technologies<br />
focusing on CMOS-based bio-sensors,<br />
device physics-related circuit<br />
design, and advanced analog<br />
CMOS circuit design. Since 2006,<br />
he is heading a department developing<br />
DRAM Core Circuitry at<br />
Qimonda.<br />
He has authored or co-authored<br />
some 120 publications including<br />
book chapters, tutorials, invited<br />
papers, etc., and he gave lectures<br />
and courses at universities. He<br />
served as a member <strong>of</strong> the technical<br />
program committees <strong>of</strong> the<br />
International Reliability Physics<br />
Symposium (IRPS), and <strong>of</strong> the<br />
European Symposium on Reliability<br />
<strong>of</strong> Electron Devices, Failure<br />
Physics and Analysis (ESREF). He<br />
is a member <strong>of</strong> the technical program<br />
committees <strong>of</strong> the International<br />
Solid-State Circuits Conference<br />
(ISSCC), <strong>of</strong> the International<br />
Electron Device Meeting (IEDM),<br />
and <strong>of</strong> the European Solid State<br />
Device Research Conference (ESS-<br />
DERC). Moreover, in 2004, he<br />
joined the <strong>IEEE</strong> EDS VLSI Technology<br />
and Circuits Committee.<br />
Dr. <strong>The</strong>wes is a member <strong>of</strong> the<br />
<strong>IEEE</strong> and <strong>of</strong> the German Association<br />
<strong>of</strong> Electrical Engineers (VDE).<br />
Ken Uchida was<br />
born in Cambridge,<br />
MA in 1971. He<br />
received B.S. degree<br />
in physics, M.S. and<br />
Ph.D. degrees in<br />
applied physics all<br />
from the University <strong>of</strong> Tokyo,<br />
Tokyo, Japan, in 1993, 1995, and<br />
2002, respectively. In 1995, he<br />
joined the Research and Development<br />
Center, Toshiba Corporation,<br />
Kawasaki, Japan. He has studied<br />
carrier transport properties in<br />
nano-scaled devices such as Single-Electron<br />
Devices, Schottky<br />
source/drain MOSFETs, Ultrathinbody<br />
SOI MOSFETs, Strained Silicon<br />
MOSFETs, and Carbon Nanotube<br />
Transistors. He developed the<br />
physics-based compact model <strong>of</strong><br />
single-electron transistors and the<br />
design scheme <strong>of</strong> single-electron<br />
logic circuits. He investigated the<br />
physical mechanisms <strong>of</strong> mobility<br />
enhancement in uniaxial stressed<br />
66 <strong>IEEE</strong> SSCS NEWSLETTER Winter 2007