tesi R. Miscioscia.pdf - EleA@UniSA

Chapter 3
Gate-leakages in polymeric
dielectrics and layout optimization
The purpose of this chapter is to highlight the importance of the
analysis of non-idealities in the static electrical characteristics of
organic p-type thin film transistors (OTFTs). Such studies can
improve the interpretations of the performance parameters as carrier
mobility and device threshold voltage. Our investigation includes the
characterization of Pentacene-OTFTs fabricated with different gate
dielectrics to study the impact of gate leakage currents in the modeling
of static characteristics of the device, and the effects of thermal
annealing on such device non-idealities.
3.1 Introduction
Pentacene (C22H14) thin films for organic electronic applications
have been widely exploited for research purposes, because of their
good field-effect mobility enhanced by past advances in vacuumbased
deposition techniques[1]. For these reasons such organic
semiconductor is considered a benchmark material in OTFT studies
and surface’s optimization. Therefore, our analysis will take
advantage of the literature knowledge about this material to
investigate gate-dielectric static dissipations.
The gate leakage current is one of the most important nonidealities
in field-effect transistors operation, in particular for
applications in digital logic circuits and in pixel-drivers of active
matrix organic displays backplanes. The presence of such leakage is
evident in ID/VDS output characteristics, which fail zero-crossing at
VDS = 0 V in the linear region. Thus, the operation in this regime
becomes difficult and performances decrease, also in terms of on-off
currents ratio [3]. In some works, a thermal annealing has been proved