Superconducting Technology Assessment - nitrd

Table 1
Representative Nb and NbN-Based IC Processes
systems and ultrafast digital switching networks will benefit
from its unparalleled speed and low power that far outweighs
the need to provide 4 or 10 K operating environment [10],
[11]. RSFQ logic may play a key role in future quantum
computers as readout and control circuits for Josephson
junction-based qubits [12]–[14].
For these reasons, RSFQ logic has gained wide
acceptance. In the past ten years, many organizations
have developed and sustain advanced fabrication processes
or are developing their next-generation process tailored to
RSFQ logic chip production (see Table 1). Both niobium and
niobium nitride superconductor material technologies are
supported. Several of the organizations in Table 1 provide
valuable foundry services to the industrial and academic
communities. For example, HYPRES, in the United States,
has tailored its 1-kA/cm fabrication process to allow a
large variety of different chip designs on a single 150-mm
wafer. Although the fabrication technology is not the most
advanced, the cost per chip is low, which is particularly
attractive to the academic community for testing a new
idea or design. HYPRES is also developing an advanced
4.5-kA/cm foundry process and a very low current density,
30-A/cm process for the development of quantum computing
circuits. Foundry services, available from SRL, are
enabling many groups in Japan to design and test new circuit
concepts. The SRL foundry offers a 2.5-kA/cm process and
is developing its next-generation 10-kA/cm process.
The full potential of digital superconductor logic-based
systems can only be realized with advanced chip fabrication
technology [15]. In the United States, advances in chip fabrication
are being driven in part by the need to demonstrate niobium-based
digital VLSI logic chips for high-performance,
petaFLOPS computing using the Hybrid Technology Multithreaded
(HTMT) architecture [16]. Under the aggressive
schedule of the HTMT architecture study program, chip fabrication
technology advanced by two generations in junction
current density from 2 kA/cm to 8 kA/cm [17]. A
12-stage static divider or counter, fabricated in the 8-kA/cm
process, demonstrated correct operation from dc to 300
GHz [18], and a more complex RSFQ logic circuit achieved
60-Gb/s operation at low bit error rates [19].
Advanced fabrication processes simultaneously have
reduced junction size, kept junction critical current
spreads below 2% 1 , and improved chip yields compared
to a decade ago. These advances have come from
cooperative efforts between industrial and university research
groups. The next-generation 20-kA/cm 0.8- m
junction, six-metal layer niobium process is expected to
achieve on-chip clock rates of 80–100 GHz and gate
density greater than 50 000 gates/cm . This paper describes
the present, well-established niobium-based chip
fabrication technology and the roadmap to a 20-kA/cm
0.8- m process. We also discuss niobium nitride-based
chip fabrication, which is much less mature compared to
1518 PROCEEDINGS OF THE IEEE, VOL. 92, NO. 10, OCTOBER 2004