Superconducting Technology Assessment - nitrd

■
ISTEC-SRL: a collaboration among government,
university, and industry in Japan has mounted
the Japanese effort to develop and apply RSFQ
technology for high-speed servers and communication
routers under a five-year Superconductor Network
Device project, funded by the Japanese government.
It is currently developing a plan for a petaflops
computer project.
■
Chalmers University: in Sweden is developing
RSFQ technology to reduce the error rates in CDMA
cell-phone base-stations.
Figure 3.1-2. Photograph of 1-cm 2 Flux-1 63K JJ
microprocessor chip.
Until recently, only small-scale Single Flux Quantum (SFQ) circuits were being developed for mixed signal applications.
The simplest circuits were asynchronous binary ripple counters for A/D converters, but many also included logic
sections such as digital filters. Some used multiple low-JJ-count chips flip-chip bonded on a superconducting
substrate. Cell libraries were developed by adapting CAD tools developed for the semiconductor industry augmented
by tools specialized for superconductors. Complex circuits, incorporating from 7 k to 70 k JJs were designed for
operation from 17 to 20 GHz and fabricated in R&D facilities. Many were successfully tested at low speed. Less
complex circuits have been successfully tested at speeds in excess of 20 GHz. Table 3.1-1 lists some recently reported
circuits. Successful development of RSFQ processors depends critically on the availability of a reliable, industrialquality
VLSI fabrication facility that does not exist today.
44