1Gb: x8, x16 Automotive DDR2 SDRAM - Micron

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READ with Auto Precharge If A10 is high when a READ command is issued, the READ with auto precharge function is engaged. The DDR2 SDRAM starts an auto precharge operation on the rising clock edge that is AL + (BL/2) cycles later than the read with auto precharge command provided tRAS (MIN) and tRTP are satisfied. If tRAS (MIN) is not satisfied at this rising clock edge, the start point of the auto precharge operation will be delayed until tRAS (MIN) is satisfied. If tRTP (MIN) is not satisfied at this rising clock edge, the start point of the auto precharge operation will be delayed until tRTP (MIN) is satisfied. When the internal precharge is pushed out by tRTP, tRP starts at the point where the internal precharge happens (not at the next rising clock edge after this event). When BL = 4, the minimum time from READ with auto precharge to the next ACTIVATE command is AL + ( tRTP + tRP)/ tCK. When BL = 8, the minimum time from READ with auto precharge to the next ACTIVATE command is AL + 2 clocks + ( tRTP + tRP)/ tCK. The term ( tRTP + tRP)/ tCK is always rounded up to the next integer. A general purpose equation can also be used: AL + BL/2 - 2CK + ( tRTP + tRP)/ tCK. In any event, the internal precharge does not start earlier than two clocks after the last 4-bit prefetch. READ with auto precharge command may be applied to one bank while another bank is operational. This is referred to as concurrent auto precharge operation, as noted in Table 41. Examples of READ with precharge and READ with auto precharge with applicable timing requirements are shown in Figure 50 (page 95) and Figure 51 (page 96), respectively. Table 41: READ Using Concurrent Auto Precharge 1Gb: x8, x16 Automotive DDR2 SDRAM READ From Command (Bank n) To Command (Bank m) Minimum Delay (with Concurrent Auto Precharge) Units READ with auto precharge READ or READ with auto precharge BL/2 tCK WRITE or WRITE with auto precharge (BL/2) + 2 tCK PRECHARGE or ACTIVATE 1 tCK PDF: 09005aef840eff89 1gbddr2_ait_aat.pdf – Rev. C 7/11 EN 94 Micron Technology, Inc. reserves the right to change products or specifications without notice. � 2010 Micron Technology, Inc. All rights reserved.
Figure 50: Bank Read – Without Auto Precharge CK# CK CKE A10 Bank address DM DQS, DQS# DQ 8 T0 T1 T2 T3 T4 T5 T6 T7 T7n T8 T8n NOP1 Command ACT Address RA Case 1: t AC (MIN) and t DQSCK (MIN) Case 2: t AC (MAX) and t DQSCK (MAX) DQS, DQS# DQ 8 tCK tCH tCL tRCD tRAS3 tRC NOP 1 RA Col n Bank x PRE3 NOP1 NOP1 NOP1 NOP1 READ2 5 Bank x 1Gb: x8, x16 Automotive DDR2 SDRAM READ CL = 3 tRTP 4 tLZ (MIN) tLZ (MAX) All banks One bank Bank x6 tRP tDQSCK (MIN) 7 tRPRE tRPST 7 7 tLZ (MIN) tAC (MIN) tDQSCK (MAX) tRPRE tLZ (MIN) DO n DO n tAC (MAX) Transitioning Data tHZ (MIN) tHZ (MAX) T9 ACT RA RA Bank x tRPST 7 Don’t Care Notes: 1. NOP commands are shown for ease of illustration; other commands may be valid at these times. 2. BL = 4 and AL = 0 in the case shown. 3. The PRECHARGE command can only be applied at T6 if t RAS (MIN) is met. 4. READ-to-PRECHARGE = AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK). 5. Disable auto precharge. 6. “Don’t Care” if A10 is HIGH at T5. 7. I/O balls, when entering or exiting High-Z, are not referenced to a specific voltage level, but to when the device begins to drive or no longer drives, respectively. 8. DO n = data-out from column n; subsequent elements are applied in the programmed order. PDF: 09005aef840eff89 1gbddr2_ait_aat.pdf – Rev. C 7/11 EN 95 Micron Technology, Inc. reserves the right to change products or specifications without notice. � 2010 Micron Technology, Inc. All rights reserved.
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Automotive DDR2 SDRAM MT47H128M8 -
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1Gb: x8, x16 Automotive DDR2 SDRAM
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Functional Description Automotive I
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Functional Block Diagrams The DDR2
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Ball Assignments and Descriptions F
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Table 3: FBGA 84-Ball - x16 and 60-
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Packaging Package Dimensions Figure
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FBGA Package Capacitance Table 4: I
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Table 6: Temperature Limits Paramet
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I DD7 Conditions The detailed timin
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Table 10: DDR2 I DD Specifications
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PDF: 09005aef840eff89 Micron Techno
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AC and DC Operating Conditions Tabl
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Input Electrical Characteristics an
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Page 45 and 46: Table 19: Output Characteristics Pa
Page 47 and 48: Figure 15: Full Strength Pull-Up Ch
Page 49 and 50: Figure 17: Reduced Strength Pull-Up
Page 51 and 52: AC Overshoot/Undershoot Specificati
Page 53 and 54: Input Slew Rate Derating 1Gb: x8, x
Page 57 and 58: Figure 23: Nominal Slew Rate for t
Page 61 and 62: Table 34: Single-Ended DQS Slew Rat
Page 63 and 64: Figure 27: Nominal Slew Rate for t
Page 65 and 66: Figure 31: AC Input Test Signal Wav
Page 67 and 68: 6. Bank addresses (BA) determine wh
Page 69 and 70: Table 38: Truth Table - Current Sta
Page 71 and 72: NO OPERATION (NOP) LOAD MODE (LM) A
Page 73 and 74: Burst Length Figure 33: MR Definiti
Page 75 and 76: Write Recovery Power-Down Mode 1Gb:
Page 77 and 78: Extended Mode Register (EMR) Figure
Page 79 and 80: On-Die Termination (ODT) ODT effect
Page 81 and 82: Extended Mode Register 2 (EMR2) Fig
Page 83 and 84: PDF: 09005aef840eff89 Micron Techno
Page 87 and 88: Figure 42: Multibank Activate Restr
Page 89 and 90: Figure 43: READ Latency CK# CK Comm
Page 91 and 92: Figure 45: Nonconsecutive READ Burs
Page 93: Figure 48: READ-to-PRECHARGE - BL =
Page 97 and 98: Figure 52: x4, x8 Data Output Timin
Page 99 and 100: Figure 54: Data Output Timing - t A
Page 101 and 102: Figure 55: Write Burst CK# CK Comma
Page 103 and 104: Figure 58: WRITE Interrupted by WRI
Page 105 and 106: Figure 60: WRITE-to-PRECHARGE CK# C
Page 107 and 108: Figure 62: Bank Write - with Auto P
Page 109 and 110: Figure 64: Data Input Timing PRECHA
Page 111 and 112: SELF REFRESH 1Gb: x8, x16 Automotiv
Page 113 and 114: Power-Down Mode 1Gb: x8, x16 Automo
Page 115 and 116: Table 43: Truth Table - CKE 1Gb: x8
Page 117 and 118: Figure 70: WRITE-to-Power-Down or S
Page 119 and 120: Figure 74: PRECHARGE Command-to-Pow
Page 121 and 122: Reset CKE Low Anytime 1Gb: x8, x16
Page 123 and 124: ODT Timing 1Gb: x8, x16 Automotive
Page 125 and 126: MRS Command to ODT Update Delay Dur
Page 127 and 128: Figure 83: ODT Turn-On Timing When
Page 129: Figure 85: ODT Turn-On Timing When
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1Gb: x8, x16 Automotive DDR2 SDRAM - Micron

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