1. First steps in Reaktor Core - Native Instruments

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The available criteria are: = equal != not equal (≠) = greater or equal (≥) > greater It is, of course, possible to connect several routers to the same comparison module, in which case they will change their state simultaneously. The Router module splits the event path into two branches. Quite often these branches will later be merged: Depending on the result of the comparison the above structure will either invert the input signal or leave it intact. An alternative implementation of this structure would be: 106 – REAKTOR CORE
In this version, the 0 output of the Router is disconnected; therefore, the Router works as a gate, letting the events through only if it’s in the ‘true’ state. The inverted value then arrives at the second input of the Merge, thus overriding the non-inverted value, which is always arriving at the first input. If the router is in ‘false’ state the inverter doesn’t receive an event and doesn’t send an event to the second input of the Merge; therefore, the original unmodified signal goes to the output of the Merge. The branches are most often merged with a Merge module. But theoretically speaking you could use many other modules (for example, arithmetic modules like adder, multiplier, and so on) instead. Routers treat the initialization event just like any other event. Therefore, one could filter out the initialization event by using routers, thereby ensuring that the initialization event won’t appear in particular areas of the structure. 6.2. Building a signal clipper Let’s build a Reaktor Core macro structure that would clip the incoming audio signal from the top at a specified level: If the input signal is not greater than the threshold it will be routed to output 0 of the Router and, through the Merge, to the output of the structure. Otherwise, the signal will be routed to output 1, where it triggers the latch, sending the threshold value to the Merge instead. The same thing happens during initialization. Note that this structure will not change its output in response to changes to the threshold. Rather the new threshold value will be used for the next and all subsequent events at the signal input. This is in a way similar to a modulation macro’s behavior, where modulator changes do not result in output events. REAKTOR CORE – 107
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REAKTOR CORE Tutorial
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Table of Contents 1. First steps in
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Appendix D. Core cell ports .......
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H.7. Audio Mix-Amp > Gain (dB) ....
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H.88. Logic > GT / IGT ............
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1. First steps in Reaktor Core 1.1.
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You may also want to save core cell
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1.3. Using core cells in a real exa
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1.4. Basic editing of core cells No
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You can shrink them back by right-c
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or design of the module. Generally,
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And here is an example of an event
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converter. As a result, our control
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The VCF section could be promising,
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There’s only one kind of module y
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As the name implies (and the info t
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Now you can type some text into the
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Instead of a nasty looking diagonal
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Some types of processing, mixing fo
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mix it with the delayed signal. Bec
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0.02ms at 44.1kHz, even less at hig
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The Latch and Bool C types of ports
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In the value field type a new value
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modules in the same way we did earl
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2.5. Using audio as control signal
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some primary-level event signals us
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is always at full amplitude. At 1 t
Page 55 and 56: The Gate2L, AND, and L2Gate modules
Page 57 and 58: Here is a picture of a continuous s
Page 59 and 60: 3.3. Simultaneous events Consider t
Page 61 and 62: 3.4. Processing order As you have s
Page 63 and 64: Event Inputs send core events to th
Page 65 and 66: Of course, in this particular case
Page 67 and 68: Now move the knob and watch the out
Page 69 and 70: 4.2. Object Bus Connections Object
Page 71 and 72: As mentioned, the above structure i
Page 73 and 74: constants would send their values a
Page 75 and 76: 4.4. Building an event accumulator
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Page 79 and 80: Now the reset works as specified. T
Page 81 and 82: output values. Let’s try that wit
Page 83 and 84: Should any files be found in this C
Page 85 and 86: The name “Modulation”, although
Page 87 and 88: 5. Audio processing at its core 5.1
Page 89 and 90: 5.2. Sampling rate clock bus A coup
Page 91 and 92: We have already seen a structure bu
Page 93 and 94: connections will be marked as inval
Page 95 and 96: As you can see, the clock input of
Page 97 and 98: left which we cannot see from the o
Page 99 and 100: samples, we have to produce several
Page 101 and 102: 5.6. Other bad numbers Denormal num
Page 103 and 104: 6.28319 is 2*π, which is then divi
Page 105: 6. Conditional processing 6.1. Even
Page 109 and 110: First we are going to build the cir
Page 111 and 112: default means use whatever precisio
Page 113 and 114: Switching between float and integer
Page 115 and 116: The output and all built-in modules
Page 117 and 118: The OBC chain at the bottom keeps t
Page 119 and 120: The speed of the number change in t
Page 121 and 122: And now the connection: The upper i
Page 123 and 124: This macro internally has an Index
Page 125 and 126: The four Write [] modules will take
Page 127 and 128: In general, you should also take ca
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Page 131 and 132: The size property of the array can
Page 133 and 134: So we include another macro for wra
Page 135 and 136: A new dialog will appear: What you
Page 137 and 138: Formal output precision Now that we
Page 139 and 140: 9. Building optimal structures As a
Page 141 and 142: 9.3. Numerical operations Floating
Page 143 and 144: Appendix A. Reaktor Core user inter
Page 145 and 146: Appendix B. Reaktor Core concept B.
Page 147 and 148: Appendix C. Core macro ports C.1. I
Page 149 and 150: Appendix D. Core cell ports D.1. In
Page 151 and 152: F.3. Math > - Produces the differen
Page 153 and 154: F.12. Bit > Bit OR Performs the bit
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connected to the sidechain input. T
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Appendix G. Expert macros G.1. Clip
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G.12. Math > sqrt Square root appro
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G.24. Memory > Read [] Reads a valu
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Appendix H. Standard macros H.1. Au
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H.8. Audio Mix-Amp > Invert Inverts
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H.15. Audio Mix-Amp > XFade (lin) A
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H.22. Audio Shaper > Sine Shaper 4
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H.30. Control > Ctl Pan “Pans”
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H.38. Convert > ms2sec Converts the
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to positive. The allowed RM values
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H.53. EQ > Static Filter > 1-pole s
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H.62. EQ > Static Filter > 2-pole s
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H.70. Event Processing > Ctl2Gate C
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H.79. LFO > Random LFO Generates a
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H.88. Logic > GT / IGT Compares the
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Generates 4 phase-locked audio wave
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H.105. Oscillators > Quad Osc Gener
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H.112. VCF > Diode Ladder Diode-lad
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I.4. Audio Shaper > Parabol Sat Sim
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I.10. Control > Par Ctl Shaper Appl
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I.17. EQ > HighShelf EQ 1-pole high
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I.25. EQ > Static Filter > 2-pole s
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I.33. Oscillator > 4-Wave Mst Gener
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I.39. Oscillator > MultiWave Osc Ge
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I.44. VCF > 2 Pole SV x3 S 2-pole s
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Index A Array module ..............
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1. First steps in Reaktor Core - Native Instruments

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