1. First steps in Reaktor Core - Native Instruments

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3. Reaktor Core fundamentals: the core signal model 3.1. Values Most of the outputs of Reaktor Core modules produce values. (Producing a value means that at any moment in time there is a value associated with the output.) The values are available to all modules whose inputs are connected to those outputs. In the following example an adder module gets values 2 and 3 from the two modules whose outputs are connected to its inputs, and it produces a value of 5 at its output. � 56 – REAKTOR CORE �� If you want to draw an analogy to the hardware world you can think of values as signal levels (voltages), especially with relatively large-scale modules such as oscillators, filters, envelopes, and so on. However, values are not limited to those kinds of processing—they are just values and can be used to implement any processing algorithm, not just voltage-modeling algorithms. 3.2. Events Time is not continuous in the digital world; it is discrete. Probably the most familiar example of this is that a digitally stored recording doesn’t store the full information about an audio signal, which is continuously changing over time, but rather stores only information about the signal level at regularly spaced points in time. The number of points per second bears the famous name of sampling rate. ��
Here is a picture of a continuous signal: � and its digital representation: � Because we are in the digital world, the outputs of our modules cannot change values continuously. On the other hand, we don’t have to limit ourselves to changing values at regularly spaced points in time. For one thing, we do not have to maintain a particular sampling rate all over our structures. For another thing, in certain areas of our structures we do not even have to maintain any sampling rate at all; that is, our changes do not have to happen at regular intervals. For example, at time zero the output of our adder could have a value of 5. The first change could occur at time 1 ms (one millisecond). The second change could occur at 4 ms. The third at 6 ms: � �� REAKTOR CORE – 57
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REAKTOR CORE Tutorial
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Table of Contents 1. First steps in
Page 5 and 6: Appendix D. Core cell ports .......
Page 7 and 8: H.7. Audio Mix-Amp > Gain (dB) ....
Page 9 and 10: H.88. Logic > GT / IGT ............
Page 11 and 12: 1. First steps in Reaktor Core 1.1.
Page 13 and 14: You may also want to save core cell
Page 15 and 16: 1.3. Using core cells in a real exa
Page 17 and 18: 1.4. Basic editing of core cells No
Page 19 and 20: You can shrink them back by right-c
Page 21 and 22: or design of the module. Generally,
Page 23 and 24: And here is an example of an event
Page 25 and 26: converter. As a result, our control
Page 27 and 28: The VCF section could be promising,
Page 29 and 30: There’s only one kind of module y
Page 31 and 32: As the name implies (and the info t
Page 33 and 34: Now you can type some text into the
Page 35 and 36: Instead of a nasty looking diagonal
Page 37 and 38: Some types of processing, mixing fo
Page 39 and 40: mix it with the delayed signal. Bec
Page 41 and 42: 0.02ms at 44.1kHz, even less at hig
Page 43 and 44: The Latch and Bool C types of ports
Page 45 and 46: In the value field type a new value
Page 47 and 48: modules in the same way we did earl
Page 49 and 50: 2.5. Using audio as control signal
Page 51 and 52: some primary-level event signals us
Page 53 and 54: is always at full amplitude. At 1 t
Page 55: The Gate2L, AND, and L2Gate modules
Page 59 and 60: 3.3. Simultaneous events Consider t
Page 61 and 62: 3.4. Processing order As you have s
Page 63 and 64: Event Inputs send core events to th
Page 65 and 66: Of course, in this particular case
Page 67 and 68: Now move the knob and watch the out
Page 69 and 70: 4.2. Object Bus Connections Object
Page 71 and 72: As mentioned, the above structure i
Page 73 and 74: constants would send their values a
Page 75 and 76: 4.4. Building an event accumulator
Page 77 and 78: � ��
Page 79 and 80: Now the reset works as specified. T
Page 81 and 82: output values. Let’s try that wit
Page 83 and 84: Should any files be found in this C
Page 85 and 86: The name “Modulation”, although
Page 87 and 88: 5. Audio processing at its core 5.1
Page 89 and 90: 5.2. Sampling rate clock bus A coup
Page 91 and 92: We have already seen a structure bu
Page 93 and 94: connections will be marked as inval
Page 95 and 96: As you can see, the clock input of
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Page 99 and 100: samples, we have to produce several
Page 101 and 102: 5.6. Other bad numbers Denormal num
Page 103 and 104: 6.28319 is 2*π, which is then divi
Page 105 and 106: 6. Conditional processing 6.1. Even
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In this version, the 0 output of th
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First we are going to build the cir
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default means use whatever precisio
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Switching between float and integer
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The output and all built-in modules
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The OBC chain at the bottom keeps t
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The speed of the number change in t
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And now the connection: The upper i
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This macro internally has an Index
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The four Write [] modules will take
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In general, you should also take ca
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� ��
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The size property of the array can
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So we include another macro for wra
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A new dialog will appear: What you
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Formal output precision Now that we
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9. Building optimal structures As a
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9.3. Numerical operations Floating
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Appendix A. Reaktor Core user inter
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Appendix B. Reaktor Core concept B.
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Appendix C. Core macro ports C.1. I
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Appendix D. Core cell ports D.1. In
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F.3. Math > - Produces the differen
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F.12. Bit > Bit OR Performs the bit
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that the module on the picture abov
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connected to the sidechain input. T
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Appendix G. Expert macros G.1. Clip
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G.12. Math > sqrt Square root appro
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G.24. Memory > Read [] Reads a valu
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Appendix H. Standard macros H.1. Au
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H.8. Audio Mix-Amp > Invert Inverts
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H.15. Audio Mix-Amp > XFade (lin) A
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H.22. Audio Shaper > Sine Shaper 4
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H.30. Control > Ctl Pan “Pans”
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H.38. Convert > ms2sec Converts the
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to positive. The allowed RM values
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H.53. EQ > Static Filter > 1-pole s
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H.62. EQ > Static Filter > 2-pole s
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H.70. Event Processing > Ctl2Gate C
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H.79. LFO > Random LFO Generates a
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H.88. Logic > GT / IGT Compares the
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Generates 4 phase-locked audio wave
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H.105. Oscillators > Quad Osc Gener
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H.112. VCF > Diode Ladder Diode-lad
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I.4. Audio Shaper > Parabol Sat Sim
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I.10. Control > Par Ctl Shaper Appl
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I.17. EQ > HighShelf EQ 1-pole high
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I.25. EQ > Static Filter > 2-pole s
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I.33. Oscillator > 4-Wave Mst Gener
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I.39. Oscillator > MultiWave Osc Ge
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I.44. VCF > 2 Pole SV x3 S 2-pole s
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Index A Array module ..............
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1. First steps in Reaktor Core - Native Instruments

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