1. First steps in Reaktor Core - Native Instruments
1. First steps in Reaktor Core - Native Instruments
1. First steps in Reaktor Core - Native Instruments
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the other output receives no events (<strong>in</strong> particular, that means the value of the<br />
other output cannot change).<br />
The Router is controlled by a BoolCtl type of <strong>in</strong>put connection. On the other<br />
side of the connection you would typically have a Compare module (sometimes<br />
a few <strong>in</strong>termediate modules like BoolCtl macro ports can be placed between<br />
the Compare and the Router).<br />
By us<strong>in</strong>g Routers you can dynamically enable or disable evaluations <strong>in</strong> parts<br />
of your structure.<br />
Typically, after splitt<strong>in</strong>g the signal path <strong>in</strong> two us<strong>in</strong>g a Router, you would merge<br />
the two branches us<strong>in</strong>g a Merge or other module. Often you would merge a<br />
branch with the orig<strong>in</strong>al, unsplit signal. But generally you are free to do whatever<br />
you want there (be careful with performance issues though).<br />
B.5. Latch<strong>in</strong>g<br />
Latch<strong>in</strong>g is probably the most common technique <strong>in</strong> <strong>Reaktor</strong> <strong>Core</strong>. It means<br />
us<strong>in</strong>g Latch modules to prevent events from be<strong>in</strong>g sent at the wrong time.<br />
For example you wouldn’t want a control signal event to trigger a computation<br />
<strong>in</strong> an audio loop.<br />
Alternatively you can use macros from the Expert Macros > Modulation group,<br />
which are basically a set of the most typical comb<strong>in</strong>ations of Latches with<br />
arithmetic process<strong>in</strong>g modules.<br />
B.6. Clock<strong>in</strong>g<br />
Clocks are sources of events. The clock events typically occur at regular time<br />
<strong>in</strong>tervals correspond<strong>in</strong>g to the clock rate. You normally need clocks to drive<br />
various modules, such as oscillators, filters, and so on. Most of the implementations<br />
of such modules do not require an explicit clock connection from the<br />
outside, but implicitly use a standard clock source available <strong>in</strong> core structures.<br />
That source is the sample rate clock, which runs at the default audio rate.<br />
Note that <strong>in</strong> event core cells, although the connection to the sample rate clock<br />
is available, the clock signal itself is not available. Therefore most oscillators,<br />
filters, and similar modules will not run <strong>in</strong> event core cells.<br />
146 – REAKTOR CORE