1. First steps in Reaktor Core - Native Instruments

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H.66. Event Processing > Clk Div Clock frequency divider. The clock events arriving at the upper input will be filtered, allowing only 1st, N+1th, 2N+1th etc. events to come through (N is the value at the lower input and specifies the division ratio). H.67. Event Processing > Clk Gen Generates clock events at the rate specified by the input (in Hz). This module works only inside audio core cells. H.68. Event Processing > Clk Rate Estimates the rate and the period of the incoming clock events. The F output is the rate in Hz and the T output is the period in seconds. This module works only inside audio core cells. The initial period value is zero and the rate is a very large value. You get reasonable output only after the second clock event. H.69. Event Processing > Counter Counts the number of events at the upper input. An event at the Set input resets the output to the value of this event. The lower output value is the count of all previous events, the upper output value is the count of all previous events except the last one. 182 – REAKTOR CORE
H.70. Event Processing > Ctl2Gate Converts a control (or audio) signal at the upper input to the gate signal with an amplitude defined by the lower input. Positive zero crossings open the gate, negative zero crossings close the gate. H.71. Event Processing > Dup Flt / IDup Flt Filters out events with duplicate values (only events with values different from the previous one will be let through). H.72. Event Processing > Impulse Generates a one sample impulse of amplitude 1 in response to an incoming event. This module works only inside audio core cells. H.73. Event Processing > Random Generates random numbers in response to the incoming clocks. The output range is –1..1. An event at the Seed input will “reseed” the generator with the value of this event. H.74. Event Processing > Separator / ISeparator Events at the upper input with the values larger than the Thld value will be routed to the Hi output. The rest will be routed to the Lo output. REAKTOR CORE – 183
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REAKTOR CORE Tutorial
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Table of Contents 1. First steps in
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Appendix D. Core cell ports .......
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H.7. Audio Mix-Amp > Gain (dB) ....
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H.88. Logic > GT / IGT ............
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1. First steps in Reaktor Core 1.1.
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You may also want to save core cell
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1.3. Using core cells in a real exa
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1.4. Basic editing of core cells No
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You can shrink them back by right-c
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or design of the module. Generally,
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And here is an example of an event
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converter. As a result, our control
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The VCF section could be promising,
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There’s only one kind of module y
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As the name implies (and the info t
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Now you can type some text into the
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Instead of a nasty looking diagonal
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Some types of processing, mixing fo
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mix it with the delayed signal. Bec
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0.02ms at 44.1kHz, even less at hig
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The Latch and Bool C types of ports
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In the value field type a new value
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modules in the same way we did earl
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2.5. Using audio as control signal
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some primary-level event signals us
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is always at full amplitude. At 1 t
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The Gate2L, AND, and L2Gate modules
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Here is a picture of a continuous s
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3.3. Simultaneous events Consider t
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3.4. Processing order As you have s
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Event Inputs send core events to th
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Of course, in this particular case
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Now move the knob and watch the out
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4.2. Object Bus Connections Object
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As mentioned, the above structure i
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constants would send their values a
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4.4. Building an event accumulator
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� ��
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Now the reset works as specified. T
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output values. Let’s try that wit
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Should any files be found in this C
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The name “Modulation”, although
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5. Audio processing at its core 5.1
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5.2. Sampling rate clock bus A coup
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We have already seen a structure bu
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connections will be marked as inval
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As you can see, the clock input of
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left which we cannot see from the o
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samples, we have to produce several
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5.6. Other bad numbers Denormal num
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6.28319 is 2*π, which is then divi
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6. Conditional processing 6.1. Even
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In this version, the 0 output of th
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First we are going to build the cir
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default means use whatever precisio
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Switching between float and integer
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The output and all built-in modules
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The OBC chain at the bottom keeps t
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The speed of the number change in t
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And now the connection: The upper i
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This macro internally has an Index
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The four Write [] modules will take
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In general, you should also take ca
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� ��
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Page 135 and 136: A new dialog will appear: What you
Page 137 and 138: Formal output precision Now that we
Page 139 and 140: 9. Building optimal structures As a
Page 141 and 142: 9.3. Numerical operations Floating
Page 143 and 144: Appendix A. Reaktor Core user inter
Page 145 and 146: Appendix B. Reaktor Core concept B.
Page 147 and 148: Appendix C. Core macro ports C.1. I
Page 149 and 150: Appendix D. Core cell ports D.1. In
Page 151 and 152: F.3. Math > - Produces the differen
Page 153 and 154: F.12. Bit > Bit OR Performs the bit
Page 155 and 156: that the module on the picture abov
Page 157 and 158: connected to the sidechain input. T
Page 159 and 160: Appendix G. Expert macros G.1. Clip
Page 161 and 162: G.12. Math > sqrt Square root appro
Page 163 and 164: G.24. Memory > Read [] Reads a valu
Page 165 and 166: Appendix H. Standard macros H.1. Au
Page 167 and 168: H.8. Audio Mix-Amp > Invert Inverts
Page 169 and 170: H.15. Audio Mix-Amp > XFade (lin) A
Page 171 and 172: H.22. Audio Shaper > Sine Shaper 4
Page 173 and 174: H.30. Control > Ctl Pan “Pans”
Page 175 and 176: H.38. Convert > ms2sec Converts the
Page 177 and 178: to positive. The allowed RM values
Page 179 and 180: H.53. EQ > Static Filter > 1-pole s
Page 181: H.62. EQ > Static Filter > 2-pole s
Page 185 and 186: H.79. LFO > Random LFO Generates a
Page 187 and 188: H.88. Logic > GT / IGT Compares the
Page 189 and 190: Generates 4 phase-locked audio wave
Page 191 and 192: H.105. Oscillators > Quad Osc Gener
Page 193 and 194: H.112. VCF > Diode Ladder Diode-lad
Page 195 and 196: I.4. Audio Shaper > Parabol Sat Sim
Page 197 and 198: I.10. Control > Par Ctl Shaper Appl
Page 199 and 200: I.17. EQ > HighShelf EQ 1-pole high
Page 201 and 202: I.25. EQ > Static Filter > 2-pole s
Page 203 and 204: I.33. Oscillator > 4-Wave Mst Gener
Page 205 and 206: I.39. Oscillator > MultiWave Osc Ge
Page 207 and 208: I.44. VCF > 2 Pole SV x3 S 2-pole s
Page 209 and 210: Index A Array module ..............
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1. First steps in Reaktor Core - Native Instruments

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