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(8.5x11) 6000 Manual Cover - Newport Corporation

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Appendix C<br />

Status Reporting System<br />

On this page is a graphical representation of the status reporting system for the<br />

GPIB and RS-232 port communications. Following is a detailed description of<br />

each register and how the bits are set and reset. The interactions between<br />

registers is discussed as well as the generation of a GPIB Service Requests.<br />

C.1 Status Reporting System Flowchart<br />

Over Range CH B<br />

Saturated CH B<br />

Data Error CH B<br />

Not Used<br />

Device Event Register<br />

7 6 5 4 3 2 1 0 EVENT?<br />

AND<br />

Not Used<br />

Data Error CH A<br />

Saturated CH A<br />

Over Range CH A<br />

Device Event Enable Register<br />

7 6 5 4 3 2 1 0<br />

EVENTEN<br />

EVENTEN?<br />

OR<br />

Execution Error Bit<br />

Command Error Bit<br />

(Not Used) User Request Bit<br />

(Not Used) Power On Bit<br />

Standard Event Status Register<br />

7 6 5 4 3 2 1 0<br />

AND<br />

Device Error Bit<br />

Query Error Bit<br />

Register Control Bit (Not Used)<br />

Operation Complete Bit<br />

*ESR?<br />

Standard Event Enable Register<br />

7 6 5 4 3 2 1 0<br />

*ESE<br />

*ESE?<br />

Request for Service<br />

OR<br />

IEEE 488.1<br />

Serial Poll Response<br />

Message Available Bit<br />

Event Status Byte Bit<br />

Service Request Bit<br />

Error Queue Bit<br />

Status Byte Register<br />

7 6 5 4 3 2 1 0<br />

New Valid Data Available CH B<br />

New Data Available CH B<br />

New Valid Data Available CH A<br />

New Data Available CH A<br />

*STB?<br />

AND<br />

AND<br />

Service Request<br />

Enable Register<br />

7 6 5 4 3 2 1 0<br />

*SRE<br />

*SRE?<br />

Parallel Poll<br />

Enable Register<br />

7 6 5 4 3 2 1 0<br />

*PRE<br />

*PRE?<br />

OR<br />

OR<br />

*IST?<br />

IEEE 488.1<br />

Service Request<br />

<br />

<br />

92

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