05.06.2015 Views

DE2-115: User Manual

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Figure 6-28 RGMII interface MAC Configuration<br />

In the MAC Options tab (See Figure 6-29), users should set up proper values for the PHY chip<br />

88E1111. The MDIO Module should be included, as it is used to generate a 2.5MHz MDC clock for<br />

the PHY chip from the controller's source clock(here a 100MHz clock source is expected) to divide<br />

the MAC control register interface clock to produce the MDC clock output on the MDIO interface.<br />

The MAC control register interface clock frequency is 100MHz and the desired MDC clock<br />

frequency is 2.5MHz, so a host clock divisor of 40 should be used.<br />

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