DE2-115: User Manual
DE2-115: User Manual
DE2-115: User Manual
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
After the IR receiver on <strong>DE2</strong>-<strong>115</strong> board receives this frame, it will directly transmit that to FPGA.<br />
In this demo, the IP of IR receiver controller is implemented in the FPGA. As Figure 6-20 shows, it<br />
includes Code Detector, State Machine, and Shift Register. First, the IR receiver demodulates the<br />
signal inputs to Code Detector block .The Code Detector block will check the Lead Code and<br />
feedback the examination result to State Machine block.<br />
The State Machine block will change the state from IDLE to GUIDANCE once the Lead code is<br />
detected. Once the Code Detector has detected the Custom Code status, the current state will change<br />
from GUIDANCE to DATAREAD state. At this state, the Code Detector will save the Custom Code<br />
and Key/Inv Key Code and output to Shift Register then displays it on 7-segment displays. Figure<br />
6-21 shows the state shift diagram of State Machine block. Note that the input clock should be<br />
50MHz.<br />
Figure 6-20 The IR Receiver controller<br />
Figure 6-21 State shift diagram of State Machine<br />
98