DE2-115: User Manual

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Finally, the YcrCb_to_RGB block converts the YcrCb data into RGB data output. The VGA Controller block generates standard VGA synchronous signals VGA_HS and VGA_VS to enable the display on a VGA monitor. Figure 6-1 Block diagram of the TV box demonstration • Demonstration Setup, File Locations, and Instructions Project directory: DE2_115_TV Bit stream used: DE2_115_TV.sof or DE2_115_TV.pof Connect a DVD player‟s composite video output (yellow plug) to the Video-In RCA jack (J12) of the DE2-115 board. The DVD player has to be configured to provide: o NTSC output o 60Hz refresh rate o 4:3 aspect ratio o Non-progressive video Connect the VGA output of the DE2-115 board to a VGA monitor (both LCD and CRT type of monitors should work) Connect the audio output of the DVD player to the line-in port of the DE2-115 board and connect a speaker to the line-out port. If the audio output jacks from the DVD player are RCA type, then an adaptor will be needed to convert to the mini-stereo plug supported on the DE2-115 board; this is the same type of plug supported on most computers Load the bit stream into FPGA by execute the batch file „de2_115_tv.bat‟ under DE2_115_TV\demo_batch\ folder Press KEY0 on the DE2-115 board to reset the circuit 79
Note: If the HSMC loopback adapter is mounted, the I2C_SCL will be directly routed back to I2C_SDA. Because audio chip, TV decoder chip and HSMC share one I2C bus, therefore audio and video chip won’t function correctly. Figure 6-2 illustrates the setup for this demonstration. Figure 6-2 The setup for the TV box demonstration 6.3 USB Paintbrush USB port is widely used in many multimedia products. The DE2-115 board provides a complete USB solution for both host and device applications. In this demonstration, we implement a Paintbrush application by using a USB mouse as the input device. This demonstration uses the device port of the Philips ISP1362 chip and the Nios II processor to implement a USB mouse movement detector. We also implemented a video frame buffer with a VGA controller to perform the real-time image storage and display. Figure 6-3 shows the block diagram of the circuit, which allows the user to draw lines on the VGA display screen using the USB mouse. The VGA Controller block is integrated into the Altera Avalon bus so that it can be controlled by the Nios II processor. Once the program runs, the Nios II processor is started as it will detect the existence of the USB 80
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CONTENTS Chapter 1 DE2-115 Package
Page 4 and 5:
6.9 IR Receiver Demonstration .....
Page 6 and 7:
Bag of six rubber (silicon) covers
Page 8 and 9:
Chapter 2 Introduction of the Alter
Page 10 and 11:
One 40-pin Expansion Header with di
Page 12 and 13:
40-pin expansion port o Configurabl
Page 14 and 15:
You can also connect a microphone t
Page 16 and 17:
5. The DE2_115_ControlPanel.sof bit
Page 18 and 19:
Figure 3-3 Controlling LEDs Choosin
Page 20 and 21:
Figure 3-6 Monitoring switches and
Page 22 and 23:
The Sequential Read function is use
Page 24 and 25:
3.7 SD Card The function is designe
Page 26 and 27:
1. Choosing the VGA tab leads to th
Page 28 and 29:
Figure 3-14 Testing the IR receiver
Page 30 and 31: Chapter 4 Using the DE2-115 Board T
Page 32 and 33: • Configuring the FPGA in JTAG Mo
Page 34 and 35: Figure 4-6 Connections between the
Page 36 and 37: Table 4-1 Pin Assignments for Slide
Page 38 and 39: HEX0[5] PIN_J22 Seven Segment Digit
Page 40 and 41: 4.6 Using the LCD Module The LCD mo
Page 42 and 43: Figure 4-13 HSMC VCCIO supply volta
Page 44 and 45: HSMC_RX_D_N[1] PIN_C27 HSMC_RX_D_N[
Page 46 and 47: HSMC_TX_D_N[14] PIN_U28 HSMC_TX_D_N
Page 48 and 49: The voltage level of the I/O pins o
Page 50 and 51: Figure 4-19 Using Emulated LVDS on
Page 52 and 53: 4.10 Using VGA The DE2-115 board in
Page 54 and 55: Table 4-16 Pin Assignments for ADV7
Page 56 and 57: Figure 4-24 Connections between FPG
Page 58 and 59: You will need to perform a hardware
Page 60 and 61: ENET1_TX_CLK PIN_C22 MII transmit c
Page 62 and 63: 4.17 Using the USB Interface The DE
Page 64 and 65: Table 4-26 IR Pin Assignments Signa
Page 66 and 67: • EEPROM The board has 32Kb EEPRO
Page 68 and 69: SRAM_DQ[7] PIN_AF7 SRAM Data[7] 3.3
Page 70 and 71: FL_ADDR[15] PIN_Y10 FLASH Address[1
Page 72 and 73: The top-level design file contains
Page 74 and 75: • System Configuration Under Syst
Page 76 and 77: Figure 5-6 HSMC Expansion Group The
Page 78 and 79: Chapter 6 Examples of Advanced Demo
Page 82 and 83: mouse connected to DE2-115 board. W
Page 84 and 85: sends a different USB packet to the
Page 86 and 87: Figure 6-7 Block diagram of the Kar
Page 88 and 89: Figure 6-9 Block Diagram of the SD
Page 90 and 91: Figure 6-11 Insert SD Card for the
Page 92 and 93: Main WAVE Lib System Call SEG7 I2C
Page 94 and 95: Figure 6-15 The setup for the SD mu
Page 96 and 97: Figure 6-16 Waveforms on two lines
Page 98 and 99: Figure 6-18 Remote controller Table
Page 100 and 101: We can apply the IR receiver to man
Page 102 and 103: Figure 6-23 Block diagram of the Mu
Page 104 and 105: Figure 6-24 The Setup of the Music
Page 106 and 107: • Demonstration Setup, File Locat
Page 108 and 109: Figure 6-27 MII interface MAC Confi
Page 110 and 111: Figure 6-29 MAC Options Configurati
Page 112 and 113: Figure 6-32 PHY connected to the MA
Page 114 and 115: Ethernet 1 respectively. Table 6-9
Page 116: Chapter 7 Appendix 7.1 Revision His
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DE2-115: User Manual

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