ComputerAided_Design_Engineering_amp_Manufactur.pdf
ComputerAided_Design_Engineering_amp_Manufactur.pdf
ComputerAided_Design_Engineering_amp_Manufactur.pdf
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• Programming logic and VLSI arrays,<br />
• Communication networks and protocols,<br />
• Neural networks,<br />
• Digital filters, and<br />
• Decision models.<br />
However, in most of these applications, a different graphical model is used instead, such as data<br />
flow for digital signal processing and state diagrams for communication protocols. As a result, it is<br />
desired that the tool can also draw and analyze these graphical models. The tool has been enhanced<br />
in this respect: for rapid development, the tool converts these graphs into Petri nets internally for<br />
analysis. Therefore, there is no need to develop new algorithms and codes for each type of graph.<br />
Features of the tool include:<br />
A. Data Communication: We have developed a very powerful CAD tool for designing protocols and<br />
Petri nets. 11 Currently, the tool is able to draw Petri nets, state diagrams, data flow graphs, finite state<br />
machines, and general graphical objects. Once the graph is drawn, the tool can analyze, simulate,<br />
reduce, and synthesize it. Few existing tools are capable of such an integration. The tool has been<br />
enhanced to synthesize error-recovery protocols with great time-complexity reduction, simulate<br />
extended finite state machines, hierarchically model and simulate Petri nets, automatically generate<br />
“C” codes, and generate unique I/O (UIO) conformance test patterns. We are extending the tool to<br />
• Simulate queuing networks,<br />
• Software engineering for protocol design implementation and documentation,<br />
• Advanced synthesis and reduction of communication protocols using PN,<br />
• Implementation of synthesis of local entities,<br />
• Complexity reduction in synthesizing multiparty protocols, and<br />
• Animation of protocols with real objects.<br />
B. Network Simulation: We66 have enhanced our protocol design tool for object-oriented simulations.<br />
After drawing network objects and interconnecting them, we can perform simulation.<br />
The “Step” mode allows easy debugging and detailed trace of network behavior, which<br />
is useful for computer-aided education. To illustrate, we have applied the tool to the bitonic<br />
sorting part of the Batcher-bayan network. Automatic code generation helps produce efficient<br />
“C” code for non-X-Window environments after verification via simulation.<br />
C. Parallel Processing: The above tool has been extended65 to analyze and simulate performance<br />
of DFGs. It incorporates a unique, efficient algorithm that we developed to do rate-optimal<br />
steady state scheduling without initial transients. We have extended the tool to draw multiple<br />
rate DFGs and simulate. It can find critical and subcritical loops and perform rate-optimal<br />
scheduling. The user can randomly pick a node to check its input and output values against<br />
its functional type after the simulation. The critical loops, scheduling ranges, and processor<br />
assignments can be displayed in a graphical fashion. It can also display critical paths and Gann<br />
charts for DFGs without any loops. Few tools are capable of such integration and ease of use.<br />
The final matrix theory developed is the first of its kind and is used throughout the design. It<br />
calculates the iteration bound, finds critical loops, derives formulas for scheduling ranges, and<br />
performs a fast processor assignment with rate-optimal scheduling. This eliminates the need for<br />
inequality charts for finding the scheduling ranges by Heemstra et al. 67 Most approaches repetitively<br />
update scheduling ranges (which is very time consuming), and our theory can eliminate many of<br />
these updates. Benchmark testing indicates remarkable (thousandfolds) speedup of scheduling, especially<br />
for large DFGs that take less than 1 second compared with other approaches that take several hundred<br />
seconds. In addition, the resulting scheduling needs fewer numbers of processors than other approaches.<br />
The theory has been updated to include the case of resource constraints and iteration periods<br />
greater than iteration bounds.