ComputerAided_Design_Engineering_amp_Manufactur.pdf
ComputerAided_Design_Engineering_amp_Manufactur.pdf
ComputerAided_Design_Engineering_amp_Manufactur.pdf
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
29. Jeng, M. D. and F. DiCesare, A modular synthesis technique for Petri nets, Proc. 1992 Japan-USA<br />
Symp. on Flexible Automation, pp. 1163–1170.<br />
30. Johnsonbaugh, R. and T. Murata, Additional method for reduction and expansion of markedgraphs,<br />
IEEE Trans. Circuits Syst., CAS-28, No. 10, October 1981, pp. 1009–1014.<br />
31. Koh, I. and F. DiCesare, Transformation methods for generalized Petri nets and their applications<br />
in flexible manufacturing systems, IEEE Trans Syst., Man, Cybern., SMC-21, No. 6, 1991, pp.<br />
963–973.<br />
32. Krogh, B. H. and C. I. Beck, Synthesis of place/transition nets for simulation and control of<br />
manufacturing systems, Proc. 4th IFAC/IFORS Symp. Large Scale System, Zurich, 1986.<br />
33. Kwong, Y. S., On reduction of asynchronous systems. Theorit. Comput. Sci., Vol. 5, 1977, pp. 25–50.<br />
34. Chao, D. Y., Petri net synthesis and sychronization using knitting technique, Journal of Information<br />
Science and <strong>Engineering</strong>, Vol. 15, No. 4, 1999, pp. 543–568.<br />
35. Molloy, M. K., On the integration of delay and throughput measures in distributed processing<br />
models, Ph.D Thesis, Computer Science Dept., UCLA, Los Angeles, 1981.<br />
36. Murata, T. and J. Y. Koh, Reduction and expansion of live and safe marked-graphs, IEEE Trans.<br />
Circuits Syst., CAS-27, January 1980, pp. 68–70.<br />
37. Murata, T. et al., A Petri net based controller for flexible and maintainable sequence control and<br />
its applications in factory automation, IEEE Trans. on Industrial Electronics, IE-33, 1986, pp. 1–8.<br />
38. Murata, T., Petri nets: properties, analysis and application, IEEE Proceedings, Vol. 77, No. 4, April<br />
1989, pp. 541–580.<br />
39. Murata, T., Modeling and analysis of concurrent systems, in Handbook of Software <strong>Engineering</strong>, C. Vick,<br />
and C. V. Ramamoorthy, (eds.), Van Nostrand Reinhold, 1984, pp. 39–63.<br />
40. Murata, T., Circuit theoretic analysis and synthesis of marked graphs, IEEE Trans. Circuits Syst.,<br />
CAS-24, No. 7, 1977, pp. 400–405.<br />
41. Murata, T., Synthesis of decision-free concurrent systems for prescribed resources and performance,<br />
IEEE Trans. Software <strong>Engineering</strong>, SE-6, No. 6, 1977, pp. 400–405.<br />
42. Narahari, Y. and N. Viswanadham, A Petri net approach to the modeling and analysis of flexible<br />
manufacturing systems, Annals of Operations Research, 3, 1985, pp. 449–472.<br />
43. Peterson, J. L., Petri Net Theory and the Modeling of Systems, Prentice-Hall, Englewood Cliffs, NJ,<br />
1981.<br />
44. Ramamoorthy, C. V., Y. Yaw, and W. T., Tsai, A Petri net reduction algorithm for protocol analysis,<br />
Computer Communication Review (USA), Vol. 16, No. 3, August 1986, pp. 157–166.<br />
45. Ramamoorthy, C. V. and H. So, Software requirements and specifications: status and perspectives,<br />
IEEE Tutorial: Software Methodology, 1978.<br />
46. Ramamoorthy, C. V., S. T. Dong, and Y. Usuda, The implementation of an automated protocol<br />
synthesizer (APS) and its application to the X.21 protocol, IEEE Trans. Software <strong>Engineering</strong>, XE-<br />
11, No. 9, September 1985, pp. 886–908.<br />
47. Ramamoorthy, C. V., Y. Yaw, W. T. Tsai, R. Aggarwal, and J. Song, Synthesis of two-party errorrecoverable<br />
protocols, Computer Communication Review (USA), Vol. 16, No. 3, August 1986, pp.<br />
227–235.<br />
48. Ramamoorthy, C. V., Y. Yaw, W. T. Tsai, R. Aggarwal, and J. Song, Synthesis and performance<br />
evaluation of two-party error-recoverable protocols, Proc. COMASC Symp., October 1986, pp.<br />
214–220.<br />
49. Silva, M., Toward a synchrony theory for P/T nets, in Concurrency and Nets, K. Voss, H. J. Genrich,<br />
and G. Rozenberg (eds.), Springer-Verlag, pp. 435–460.<br />
50. Suzuki, I. and T. Murata, A method for stepwise refinements and abstraction of Petri nets, J. Comp.<br />
Syst. Sci., 27, 1983, pp. 51–76.<br />
51. Valette, R., Analysis of Petri nets by stepwise refinement, J. Comp. Syst. Sci. 18, 1979, pp. 35–46.<br />
52. Valvanis, K. S., On the hierarchical analysis and simulation of flexible manufacturing systems with<br />
extended Petri nets, IEEE Trans. Syst., Man, Cybern., SMC-20, No. 1, pp. 94–100.