PIC16F8X, 18-Pin FLASH/EEPROM 8-Bit MCU Data Sheet - Microchip

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PIC16F8X FIGURE 8-12: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD): FAST VDD RISE TIME VDD MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET TPWRT FIGURE 8-13: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD): SLOW VDD RISE TIME VDD MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET TPWRT When VDD rises very slowly, it is possible that the TPWRT time-out and TOST time-out will expire before VDD has reached its final value. In this example, the chip will reset properly if, and only if, V1 ≥ VDD min. DS30430C-page 46 © 1998 Microchip Technology Inc. TOST TOST V1
8.7 Time-out Sequence and Power-down Status Bits (TO/PD) On power-up (Figure 8-10, Figure 8-11, Figure 8-12 and Figure 8-13) the time-out sequence is as follows: First PWRT time-out is invoked after a POR has expired. Then the OST is activated. The total time-out will vary based on oscillator configuration and PWRTE configuration bit status. For example, in RC mode with the PWRT disabled, there will be no time-out at all. TABLE 8-5 TIME-OUT IN VARIOUS SITUATIONS Oscillator Configuration PWRT Enabled Power-up Wake-up PWRT Disabled from SLEEP XT, HS, LP 72 ms + 1024TOSC 1024TOSC 1024TOSC RC 72 ms — — Since the time-outs occur from the POR reset pulse, if MCLR is kept low long enough, the time-outs will expire. Then bringing MCLR high, execution will begin immediately (Figure 8-10). This is useful for testing purposes or to synchronize more than one PIC16F8X device when operating in parallel. Table 8-6 shows the significance of the TO and PD bits. Table 8-3 lists the reset conditions for some special registers, while Table 8-4 lists the reset conditions for all the registers. TABLE 8-6 STATUS BITS AND THEIR SIGNIFICANCE TO PD Condition 1 1 Power-on Reset 0 x Illegal, TO is set on POR x 0 Illegal, PD is set on POR 0 1 WDT Reset (during normal operation) 0 0 WDT Wake-up 1 1 MCLR Reset during normal operation 1 0 MCLR Reset during SLEEP or interrupt wake-up from SLEEP 8.8 Reset on Brown-Out PIC16F8X A brown-out is a condition where device power (VDD) dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset a PIC16F8X device when a brown-out occurs, external brown-out protection circuits may be built, as shown in Figure 8-14 and Figure 8-15. FIGURE 8-14: BROWN-OUT PROTECTION CIRCUIT 1 This circuit will activate reset when VDD goes below (Vz + 0.7V) where Vz = Zener voltage. FIGURE 8-15: BROWN-OUT PROTECTION CIRCUIT 2 © 1998 Microchip Technology Inc. DS30430C-page 47 33k VDD VDD R1 R2 10k 40k VDD MCLR PIC16F8X This brown-out circuit is less expensive, although less accurate. Transistor Q1 turns off when VDD is below a certain level such that: VDD • Q1 40k R1 R1 + R2 VDD MCLR PIC16F8X = 0.7V
Page 1 and 2: Devices Included in this Data Sheet
Page 3 and 4: 1.0 GENERAL DESCRIPTION The PIC16F8
Page 5 and 6: 2.0 PIC16F8X DEVICE VARIETIES A var
Page 7 and 8: 3.0 ARCHITECTURAL OVERVIEW The high
Page 9 and 10: TABLE 3-1 PIC16F8X PINOUT DESCRIPTI
Page 11 and 12: 4.0 MEMORY ORGANIZATION There are t
Page 13 and 14: FIGURE 4-1: REGISTER FILE MAP - PIC
Page 15 and 16: 4.2.2.1 STATUS REGISTER The STATUS
Page 17 and 18: 4.2.2.3 INTCON REGISTER The INTCON
Page 19 and 20: 4.5 Indirect Addressing; INDF and F
Page 21 and 22: 5.0 I/O PORTS The PIC16F8X has two
Page 23 and 24: 5.2 PORTB and TRISB Registers PORTB
Page 25 and 26: 5.3 I/O Programming Considerations
Page 27 and 28: 6.0 TIMER0 MODULE AND TMR0 REGISTER
Page 29 and 30: 6.2 Using TMR0 with External Clock
Page 31 and 32: 6.3.1 SWITCHING PRESCALER ASSIGNMEN
Page 33 and 34: 7.0 DATA EEPROM MEMORY The EEPROM d
Page 35 and 36: 7.5 Write Verify Depending on the a
Page 37 and 38: 8.0 SPECIAL FEATURES OF THE CPU Wha
Page 39 and 40: FIGURE 8-2: CONFIGURATION WORD - PI
Page 41 and 42: FIGURE 8-6: EXTERNAL SERIES RESONAN
Page 43 and 44: PIC16F8X TABLE 8-3 RESET CONDITION
Page 45: PIC16F8X FIGURE 8-10: TIME-OUT SEQU
Page 49 and 50: FIGURE 8-17: INT PIN INTERRUPT TIMI
Page 51 and 52: 8.11 Watchdog Timer (WDT) The Watch
Page 53 and 54: 8.12.3 WAKE-UP USING INTERRUPTS Whe
Page 55 and 56: 9.0 INSTRUCTION SET SUMMARY Each PI
Page 57 and 58: 9.1 Instruction Descriptions ADDLW
Page 59 and 60: BTFSS Bit Test f, Skip if Set Synta
Page 61 and 62: COMF Complement f Syntax: [ label ]
Page 63 and 64: INCFSZ Increment f, Skip if 0 Synta
Page 65 and 66: NOP No Operation Syntax: [ label ]
Page 67 and 68: RLF Rotate Left f through Carry Syn
Page 69 and 70: SUBWF Subtract W from f Syntax: [ l
Page 71 and 72: 10.0 DEVELOPMENT SUPPORT 10.1 Devel
Page 73 and 74: MPASM has the following features to
Page 75 and 76: PIC16F83/84 PIC16F8X 11.0 ELECTRICA
Page 77 and 78: PIC16F83/84 PIC16F8X 11.1 DC CHARAC
Page 79 and 80: PIC16F83/84 PIC16F8X 11.3 DC CHARAC
Page 81 and 82: TABLE 11-2 TIMING PARAMETER SYMBOLO
Page 83 and 84: FIGURE 11-4: CLKOUT AND I/O TIMING
Page 85 and 86: FIGURE 11-6: TIMER0 CLOCK TIMINGS T
Page 87 and 88: PIC16CR83/84 PIC16F8X 12.0 ELECTRIC
Page 89 and 90: PIC16CR83/84 PIC16F8X 12.1 DC CHARA
Page 91 and 92: PIC16CR83/84 PIC16F8X 12.3 DC CHARA
Page 93 and 94: TABLE 12-2 TIMING PARAMETER SYMBOLO
Page 95 and 96: FIGURE 12-4: CLKOUT AND I/O TIMING
Page 97 and 98:
FIGURE 12-6: TIMER0 CLOCK TIMINGS T
Page 99 and 100:
13.0 DC & AC CHARACTERISTICS GRAPHS
Page 101 and 102:
FIGURE 13-3: TYPICAL RC OSCILLATOR
Page 103 and 104:
FIGURE 13-8: VTH (INPUT THRESHOLD V
Page 105 and 106:
FIGURE 13-11: TYPICAL IDD vs. FREQU
Page 107 and 108:
FIGURE 13-13: WDT TIMER TIME-OUT PE
Page 109 and 110:
FIGURE 13-17: IOH vs. VOH, VDD = 3
Page 111 and 112:
14.0 PACKAGING INFORMATION 14.1 Pac
Page 113 and 114:
Package Type: K04-051 18-Lead Plast
Page 115 and 116:
APPENDIX A: FEATURE IMPROVEMENTS -
Page 117 and 118:
PIC16F8X APPENDIX E: CONVERSION CON
Page 119 and 120:
INDEX Numerics 8.1 Configuration Bi
Page 121 and 122:
ON-LINE SUPPORT Microchip provides
Page 123 and 124:
PIC16F8X PRODUCT IDENTIFICATION SYS
Page 125:
M AMERICAS Corporate Office 2355 We
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PIC16F8X, 18-Pin FLASH/EEPROM 8-Bit MCU Data Sheet - Microchip

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