PIC16F8X, 18-Pin FLASH/EEPROM 8-Bit MCU Data Sheet - Microchip

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PIC16F8X IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands: 0 ≤ f ≤ 127 d ∈ [0,1] Operation: (W) .OR. (f) → (destination) Status Affected: Z Encoding: 00 0100 dfff ffff Description: Inclusive OR the W register with register ’f’. If ’d’ is 0 the result is placed in the W register. If ’d’ is 1 the result is placed back in register ’f’. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ’f’ Process data Example IORWF RESULT, 0 Before Instruction RESULT = 0x13 W After Instruction = 0x91 RESULT = 0x13 W = 0x93 Z = 1 Write to destination MOVF Move f Syntax: [ label ] MOVF f,d Operands: 0 ≤ f ≤ 127 d ∈ [0,1] Operation: (f) → (destination) Status Affected: Z Encoding: 00 1000 dfff ffff Description: The contents of register f is moved to a destination dependant upon the status of d. If d = 0, destination is W register. If d = 1, the destination is file register f itself. d = 1 is useful to test a file register since status flag Z is affected. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ’f’ Example MOVF FSR, 0 Process data Write to destination After Instruction W = value in FSR register Z = 1 MOVLW Move Literal to W Syntax: [ label ] MOVLW k Operands: 0 ≤ k ≤ 255 Operation: k → (W) Status Affected: None Encoding: 11 00xx kkkk kkkk Description: The eight bit literal ’k’ is loaded into W register. The don’t cares will assemble as 0’s. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal ’k’ Example MOVLW 0x5A Process data After Instruction W = 0x5A Write to W MOVWF Move W to f Syntax: [ label ] MOVWF f Operands: 0 ≤ f ≤ 127 Operation: (W) → (f) Status Affected: None Encoding: 00 0000 1fff ffff Description: Move data from W register to register 'f'. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ’f’ Process data Example MOVWF OPTION_REG Before Instruction OPTION = 0xFF W After Instruction = 0x4F OPTION = 0x4F W = 0x4F Write register ’f’ DS30430C-page 64 © 1998 Microchip Technology Inc.
NOP No Operation Syntax: [ label ] NOP Operands: None Operation: No operation Status Affected: None Encoding: 00 0000 0xx0 0000 Description: No operation. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Example NOP Decode No-Opera tion No-Opera tion OPTION Load Option Register Syntax: [ label ] OPTION Operands: None Operation: (W) → OPTION Status Affected: None No-Operat ion Encoding: 00 0000 0110 0010 Description: The contents of the W register are loaded in the OPTION register. This instruction is supported for code compatibility with PIC16C5X products. Since OPTION is a readable/writable register, the user can directly address it. Words: 1 Cycles: 1 Example To maintain upward compatibility with future PIC16CXX products, do not use this instruction. PIC16F8X RETFIE Return from Interrupt Syntax: [ label ] RETFIE Operands: None Operation: TOS → PC, 1 → GIE Status Affected: None Encoding: 00 0000 0000 1001 Description: Return from Interrupt. Stack is POPed and Top of Stack (TOS) is loaded in the PC. Interrupts are enabled by setting Global Interrupt Enable bit, GIE (INTCON). This is a two cycle instruction. Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 1st Cycle Decode No-Opera Set the Pop from 2nd Cycle tion GIE bit the Stack No-Operat ion No-Opera tion No-Opera tion Example RETFIE After Interrupt PC = TOS GIE = 1 No-Operat ion © 1998 Microchip Technology Inc. DS30430C-page 65
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Devices Included in this Data Sheet
Page 3 and 4:
1.0 GENERAL DESCRIPTION The PIC16F8
Page 5 and 6:
2.0 PIC16F8X DEVICE VARIETIES A var
Page 7 and 8:
3.0 ARCHITECTURAL OVERVIEW The high
Page 9 and 10:
TABLE 3-1 PIC16F8X PINOUT DESCRIPTI
Page 11 and 12:
4.0 MEMORY ORGANIZATION There are t
Page 13 and 14: FIGURE 4-1: REGISTER FILE MAP - PIC
Page 15 and 16: 4.2.2.1 STATUS REGISTER The STATUS
Page 17 and 18: 4.2.2.3 INTCON REGISTER The INTCON
Page 19 and 20: 4.5 Indirect Addressing; INDF and F
Page 21 and 22: 5.0 I/O PORTS The PIC16F8X has two
Page 23 and 24: 5.2 PORTB and TRISB Registers PORTB
Page 25 and 26: 5.3 I/O Programming Considerations
Page 27 and 28: 6.0 TIMER0 MODULE AND TMR0 REGISTER
Page 29 and 30: 6.2 Using TMR0 with External Clock
Page 31 and 32: 6.3.1 SWITCHING PRESCALER ASSIGNMEN
Page 33 and 34: 7.0 DATA EEPROM MEMORY The EEPROM d
Page 35 and 36: 7.5 Write Verify Depending on the a
Page 37 and 38: 8.0 SPECIAL FEATURES OF THE CPU Wha
Page 39 and 40: FIGURE 8-2: CONFIGURATION WORD - PI
Page 41 and 42: FIGURE 8-6: EXTERNAL SERIES RESONAN
Page 43 and 44: PIC16F8X TABLE 8-3 RESET CONDITION
Page 45 and 46: PIC16F8X FIGURE 8-10: TIME-OUT SEQU
Page 47 and 48: 8.7 Time-out Sequence and Power-dow
Page 49 and 50: FIGURE 8-17: INT PIN INTERRUPT TIMI
Page 51 and 52: 8.11 Watchdog Timer (WDT) The Watch
Page 53 and 54: 8.12.3 WAKE-UP USING INTERRUPTS Whe
Page 55 and 56: 9.0 INSTRUCTION SET SUMMARY Each PI
Page 57 and 58: 9.1 Instruction Descriptions ADDLW
Page 59 and 60: BTFSS Bit Test f, Skip if Set Synta
Page 61 and 62: COMF Complement f Syntax: [ label ]
Page 63: INCFSZ Increment f, Skip if 0 Synta
Page 67 and 68: RLF Rotate Left f through Carry Syn
Page 69 and 70: SUBWF Subtract W from f Syntax: [ l
Page 71 and 72: 10.0 DEVELOPMENT SUPPORT 10.1 Devel
Page 73 and 74: MPASM has the following features to
Page 75 and 76: PIC16F83/84 PIC16F8X 11.0 ELECTRICA
Page 77 and 78: PIC16F83/84 PIC16F8X 11.1 DC CHARAC
Page 79 and 80: PIC16F83/84 PIC16F8X 11.3 DC CHARAC
Page 81 and 82: TABLE 11-2 TIMING PARAMETER SYMBOLO
Page 83 and 84: FIGURE 11-4: CLKOUT AND I/O TIMING
Page 85 and 86: FIGURE 11-6: TIMER0 CLOCK TIMINGS T
Page 87 and 88: PIC16CR83/84 PIC16F8X 12.0 ELECTRIC
Page 89 and 90: PIC16CR83/84 PIC16F8X 12.1 DC CHARA
Page 91 and 92: PIC16CR83/84 PIC16F8X 12.3 DC CHARA
Page 93 and 94: TABLE 12-2 TIMING PARAMETER SYMBOLO
Page 95 and 96: FIGURE 12-4: CLKOUT AND I/O TIMING
Page 97 and 98: FIGURE 12-6: TIMER0 CLOCK TIMINGS T
Page 99 and 100: 13.0 DC & AC CHARACTERISTICS GRAPHS
Page 101 and 102: FIGURE 13-3: TYPICAL RC OSCILLATOR
Page 103 and 104: FIGURE 13-8: VTH (INPUT THRESHOLD V
Page 105 and 106: FIGURE 13-11: TYPICAL IDD vs. FREQU
Page 107 and 108: FIGURE 13-13: WDT TIMER TIME-OUT PE
Page 109 and 110: FIGURE 13-17: IOH vs. VOH, VDD = 3
Page 111 and 112: 14.0 PACKAGING INFORMATION 14.1 Pac
Page 113 and 114: Package Type: K04-051 18-Lead Plast
Page 115 and 116:
APPENDIX A: FEATURE IMPROVEMENTS -
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PIC16F8X APPENDIX E: CONVERSION CON
Page 119 and 120:
INDEX Numerics 8.1 Configuration Bi
Page 121 and 122:
ON-LINE SUPPORT Microchip provides
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PIC16F8X PRODUCT IDENTIFICATION SYS
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M AMERICAS Corporate Office 2355 We
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PIC16F8X, 18-Pin FLASH/EEPROM 8-Bit MCU Data Sheet - Microchip

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