Cortex-M0+ Devices Generic User Guide - Keil

Cortex-M0+ Peripherals4.4.3 SysTick Current Value RegisterThe SYST_CVR contains the current value of the SysTick counter. See the register summary inTable 4-19 on page 4-16 for its attributes. The bit assignments are:31 24 230ReservedCURRENTTable 4-22 SYST_CVR bit assignmentsBits Name Function[31:24] - Reserved.[23:0] CURRENT Reads return the current value of the SysTick counter.A write of any value clears the field to 0, and also clears the SYST_CSR.COUNTFLAG bit to 0.4.4.4 SysTick Calibration Value RegisterWhen implemented, the SYST_CALIB register indicates the SysTick calibration properties.See the register summary in Table 4-19 on page 4-16 for its attributes. The bit assignmentsare:31 30 2924 230ReservedTENMSSKEWNOREFTable 4-23 SYST_CALIB register bit assignmentsBits Name Function[31] NOREF IMPLEMENTATION DEFINED. Indicates whether a separate reference clock is provided.[30] SKEW IMPLEMENTATION DEFINED. Indicates whether the TENMS integer value is rounded from a non-integer ratio.This can affect the suitability of SysTick as a software real time clock.[29:24] - Reserved.[23:0] TENMS IMPLEMENTATION DEFINED. Indicates the reload counter value to generate a 10ms interval using the externalreference clock, or if NOREF=1, using the processor clock. Zero if this clock has unknown or variablefrequency such as would prevent a reliable approximation to 10ms.4.4.5 SysTick usage hints and tipsThe interrupt controller clock updates the SysTick counter. If this clock signal is stopped for lowpower mode, the SysTick counter stops.Ensure software uses word accesses to access the SysTick registers.The correct initialization sequence for the SysTick counter is:1. Program reload value.2. Clear current value.3. Program Control and Status register.ARM DUI 0662A Copyright © 2012 ARM. All rights reserved. 4-18ID041812Non-Confidential