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Cortex-M0+ Devices Generic User Guide - Keil

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The <strong>Cortex</strong>-<strong>M0+</strong> Instruction Set• if subtracting a negative value from a positive value generates a negative value.The Compare operations are identical to subtracting, for CMP, or adding, for CMN, except that theresult is discarded. See the instruction descriptions for more information.Condition code suffixesConditional branch is shown in syntax descriptions as B{cond}. A branch instruction with acondition code is only taken if the condition code flags in the APSR meet the specifiedcondition, otherwise the branch instruction is ignored. Table 3-4 shows the condition codes touse.Table 3-4 also shows the relationship between condition code suffixes and the N, Z, C, and Vflags.Suffix Flags MeaningTable 3-4 Condition code suffixesEQ Z = 1 Equal, last flag setting result was zeroNE Z = 0 Not equal, last flag setting result was non-zeroCS or HS C = 1 Higher or same, unsignedCC or LO C = 0 Lower, unsignedMI N = 1 NegativePL N = 0 Positive or zeroVS V = 1 OverflowVC V = 0 No overflowHI C = 1 and Z = 0 Higher, unsignedLS C = 0 or Z = 1 Lower or same, unsignedGE N = V Greater than or equal, signedLT N != V Less than, signedGT Z = 0 and N = V Greater than, signedLE Z = 1 and N != V Less than or equal, signedAL Can have any value Always. This is the default when no suffix is specified.ARM DUI 0662A Copyright © 2012 ARM. All rights reserved. 3-10ID041812Non-Confidential

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