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Cortex-M0+ Devices Generic User Guide - Keil

Cortex-M0+ Devices Generic User Guide - Keil

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The <strong>Cortex</strong>-<strong>M0+</strong> Instruction Set3.4.6 PUSH and POPPush registers onto, and pop registers off a full-descending stack.SyntaxPUSH reglistPOP reglistwhere:reglistIs a non-empty list of registers, enclosed in braces. It can contain register ranges.It must be comma separated if it contains more than one register or register range.OperationPUSH stores registers on the stack, with the lowest numbered register using the lowest memoryaddress and the highest numbered register using the highest memory address.POP loads registers from the stack, with the lowest numbered register using the lowest memoryaddress and the highest numbered register using the highest memory address.PUSH uses the value in the SP register minus four as the highest memory address, POP uses thevalue in the SP register as the lowest memory address, implementing a full-descending stack.On completion, PUSH updates the SP register to point to the location of the lowest store value,POP updates the SP register to point to the location above the highest location loaded.If a POP instruction includes PC in its reglist, a branch to this location is performed when thePOP instruction has completed. Bit[0] of the value read for the PC is used to update the APSRT-bit. This bit must be 1 to ensure correct operation.RestrictionsIn these instructions:• reglist must use only R0-R7• the exception is LR for a PUSH and PC for a POP.Condition flagsThese instructions do not change the flags.ExamplesPUSH {R0,R4-R7} ; Push R0,R4,R5,R6,R7 onto the stackPUSH {R2,LR} ; Push R2 and the link-register onto the stackPOP {R0,R6,PC} ; Pop r0,r6 and PC from the stack, then branch to; the new PC.ARM DUI 0662A Copyright © 2012 ARM. All rights reserved. 3-18ID041812Non-Confidential

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